Lines Matching refs:t
54 struct dmtimer_systimer t; member
60 struct dmtimer_systimer t; member
65 static bool dmtimer_systimer_revision1(struct dmtimer_systimer *t) in dmtimer_systimer_revision1() argument
67 u32 tidr = readl_relaxed(t->base); in dmtimer_systimer_revision1()
72 static void dmtimer_systimer_enable(struct dmtimer_systimer *t) in dmtimer_systimer_enable() argument
76 if (dmtimer_systimer_revision1(t)) in dmtimer_systimer_enable()
81 writel_relaxed(val, t->base + t->sysc); in dmtimer_systimer_enable()
84 static void dmtimer_systimer_disable(struct dmtimer_systimer *t) in dmtimer_systimer_disable() argument
86 if (!dmtimer_systimer_revision1(t)) in dmtimer_systimer_disable()
89 writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc); in dmtimer_systimer_disable()
92 static int __init dmtimer_systimer_type1_reset(struct dmtimer_systimer *t) in dmtimer_systimer_type1_reset() argument
94 void __iomem *syss = t->base + OMAP_TIMER_V1_SYS_STAT_OFFSET; in dmtimer_systimer_type1_reset()
98 dmtimer_systimer_enable(t); in dmtimer_systimer_type1_reset()
99 writel_relaxed(BIT(1) | BIT(2), t->base + t->ifctrl); in dmtimer_systimer_type1_reset()
107 static int __init dmtimer_systimer_type2_reset(struct dmtimer_systimer *t) in dmtimer_systimer_type2_reset() argument
109 void __iomem *sysc = t->base + t->sysc; in dmtimer_systimer_type2_reset()
112 dmtimer_systimer_enable(t); in dmtimer_systimer_type2_reset()
121 static int __init dmtimer_systimer_reset(struct dmtimer_systimer *t) in dmtimer_systimer_reset() argument
125 if (dmtimer_systimer_revision1(t)) in dmtimer_systimer_reset()
126 ret = dmtimer_systimer_type1_reset(t); in dmtimer_systimer_reset()
128 ret = dmtimer_systimer_type2_reset(t); in dmtimer_systimer_reset()
325 static int __init dmtimer_systimer_init_clock(struct dmtimer_systimer *t, in dmtimer_systimer_init_clock() argument
352 t->ick = clock; in dmtimer_systimer_init_clock()
354 t->fck = clock; in dmtimer_systimer_init_clock()
362 struct dmtimer_systimer *t) in dmtimer_systimer_setup() argument
371 t->base = of_iomap(np, 0); in dmtimer_systimer_setup()
372 if (!t->base) in dmtimer_systimer_setup()
385 error = dmtimer_systimer_init_clock(t, np->parent, "fck", &rate); in dmtimer_systimer_setup()
389 t->rate = rate; in dmtimer_systimer_setup()
391 error = dmtimer_systimer_init_clock(t, np->parent, "ick", &rate); in dmtimer_systimer_setup()
395 if (dmtimer_systimer_revision1(t)) { in dmtimer_systimer_setup()
396 t->irq_stat = OMAP_TIMER_V1_STAT_OFFSET; in dmtimer_systimer_setup()
397 t->irq_ena = OMAP_TIMER_V1_INT_EN_OFFSET; in dmtimer_systimer_setup()
398 t->pend = _OMAP_TIMER_WRITE_PEND_OFFSET; in dmtimer_systimer_setup()
401 t->irq_stat = OMAP_TIMER_V2_IRQSTATUS; in dmtimer_systimer_setup()
402 t->irq_ena = OMAP_TIMER_V2_IRQENABLE_SET; in dmtimer_systimer_setup()
404 t->pend = regbase + _OMAP_TIMER_WRITE_PEND_OFFSET; in dmtimer_systimer_setup()
407 t->sysc = OMAP_TIMER_OCP_CFG_OFFSET; in dmtimer_systimer_setup()
408 t->load = regbase + _OMAP_TIMER_LOAD_OFFSET; in dmtimer_systimer_setup()
409 t->counter = regbase + _OMAP_TIMER_COUNTER_OFFSET; in dmtimer_systimer_setup()
410 t->ctrl = regbase + _OMAP_TIMER_CTRL_OFFSET; in dmtimer_systimer_setup()
411 t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET; in dmtimer_systimer_setup()
412 t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET; in dmtimer_systimer_setup()
414 dmtimer_systimer_reset(t); in dmtimer_systimer_setup()
415 dmtimer_systimer_enable(t); in dmtimer_systimer_setup()
416 pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base), in dmtimer_systimer_setup()
417 readl_relaxed(t->base + t->sysc)); in dmtimer_systimer_setup()
422 iounmap(t->base); in dmtimer_systimer_setup()
437 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_clockevent_interrupt() local
439 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_stat); in dmtimer_clockevent_interrupt()
449 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_set_next_event() local
450 void __iomem *pend = t->base + t->pend; in dmtimer_set_next_event()
452 writel_relaxed(0xffffffff - cycles, t->base + t->counter); in dmtimer_set_next_event()
456 writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl); in dmtimer_set_next_event()
466 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_clockevent_shutdown() local
467 void __iomem *ctrl = t->base + t->ctrl; in dmtimer_clockevent_shutdown()
477 udelay(3500000 / t->rate + 1); in dmtimer_clockevent_shutdown()
479 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_stat); in dmtimer_clockevent_shutdown()
487 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_set_periodic() local
488 void __iomem *pend = t->base + t->pend; in dmtimer_set_periodic()
493 writel_relaxed(clkevt->period, t->base + t->load); in dmtimer_set_periodic()
497 writel_relaxed(clkevt->period, t->base + t->counter); in dmtimer_set_periodic()
502 t->base + t->ctrl); in dmtimer_set_periodic()
512 struct dmtimer_systimer *t = &clkevt->t; in omap_clockevent_idle() local
514 dmtimer_systimer_disable(t); in omap_clockevent_idle()
515 clk_disable(t->fck); in omap_clockevent_idle()
521 struct dmtimer_systimer *t = &clkevt->t; in omap_clockevent_unidle() local
524 error = clk_enable(t->fck); in omap_clockevent_unidle()
528 dmtimer_systimer_enable(t); in omap_clockevent_unidle()
529 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena); in omap_clockevent_unidle()
530 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->wakeup); in omap_clockevent_unidle()
537 struct dmtimer_systimer *t; in dmtimer_clockevent_init() local
544 t = &clkevt->t; in dmtimer_clockevent_init()
566 error = dmtimer_systimer_setup(np, &clkevt->t); in dmtimer_clockevent_init()
570 clkevt->period = 0xffffffff - DIV_ROUND_CLOSEST(t->rate, HZ); in dmtimer_clockevent_init()
577 writel_relaxed(OMAP_TIMER_CTRL_POSTED, t->base + t->ifctrl); in dmtimer_clockevent_init()
584 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena); in dmtimer_clockevent_init()
585 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->wakeup); in dmtimer_clockevent_init()
589 "always-on " : "", t->rate, np->parent); in dmtimer_clockevent_init()
591 clockevents_config_and_register(dev, t->rate, in dmtimer_clockevent_init()
604 iounmap(t->base); in dmtimer_clockevent_init()
622 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_read_cycles() local
624 return (u64)readl_relaxed(t->base + t->counter); in dmtimer_clocksource_read_cycles()
637 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_suspend() local
639 clksrc->loadval = readl_relaxed(t->base + t->counter); in dmtimer_clocksource_suspend()
640 dmtimer_systimer_disable(t); in dmtimer_clocksource_suspend()
641 clk_disable(t->fck); in dmtimer_clocksource_suspend()
647 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_resume() local
650 error = clk_enable(t->fck); in dmtimer_clocksource_resume()
654 dmtimer_systimer_enable(t); in dmtimer_clocksource_resume()
655 writel_relaxed(clksrc->loadval, t->base + t->counter); in dmtimer_clocksource_resume()
657 t->base + t->ctrl); in dmtimer_clocksource_resume()
663 struct dmtimer_systimer *t; in dmtimer_clocksource_init() local
672 t = &clksrc->t; in dmtimer_clocksource_init()
674 error = dmtimer_systimer_setup(np, t); in dmtimer_clocksource_init()
690 writel_relaxed(0, t->base + t->counter); in dmtimer_clocksource_init()
692 t->base + t->ctrl); in dmtimer_clocksource_init()
699 dmtimer_sched_clock_counter = t->base + t->counter; in dmtimer_clocksource_init()
700 sched_clock_register(dmtimer_read_sched_clock, 32, t->rate); in dmtimer_clocksource_init()
703 if (clocksource_register_hz(dev, t->rate)) in dmtimer_clocksource_init()