Lines Matching refs:clk_rate
190 static void __init mchp_pit64b_pres_compute(u32 *pres, u32 clk_rate, in mchp_pit64b_pres_compute() argument
196 tmp = clk_rate / (*pres + 1); in mchp_pit64b_pres_compute()
297 u32 clk_rate) in mchp_pit64b_init_clksrc() argument
305 ret = clocksource_mmio_init(timer->base, MCHP_PIT64B_NAME, clk_rate, in mchp_pit64b_init_clksrc()
317 sched_clock_register(mchp_pit64b_sched_read_clk, 64, clk_rate); in mchp_pit64b_init_clksrc()
323 u32 clk_rate, u32 irq) in mchp_pit64b_init_clkevt() argument
332 mchp_pit64b_ce_cycles = DIV_ROUND_CLOSEST(clk_rate, HZ); in mchp_pit64b_init_clkevt()
357 clockevents_config_and_register(&ce->clkevt, clk_rate, 1, ULONG_MAX); in mchp_pit64b_init_clkevt()
367 unsigned long clk_rate; in mchp_pit64b_dt_init_timer() local
406 clk_rate = clk_get_rate(timer.gclk); in mchp_pit64b_dt_init_timer()
408 clk_rate = clk_get_rate(timer.pclk); in mchp_pit64b_dt_init_timer()
410 clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1); in mchp_pit64b_dt_init_timer()
413 ret = mchp_pit64b_init_clkevt(&timer, clk_rate, irq); in mchp_pit64b_dt_init_timer()
415 ret = mchp_pit64b_init_clksrc(&timer, clk_rate); in mchp_pit64b_dt_init_timer()