Lines Matching +full:50 +full:mhz

107 	 * 33 or 25 MHz respectively.  in vco_get()
262 		/* Divides between 3 and 50 MHz in steps of 0.25 MHz */  in icst_round_rate()
267 		/* Slam to closest 0.25 MHz */  in icst_round_rate()
273 		 * If we're below or less than halfway from 25 to 33 MHz  in icst_round_rate()
274 		 * select 25 MHz  in icst_round_rate()
438 	/* Minimum 12 MHz, VDW = 4 */
441 	 * Maximum 160 MHz, VDW = 152 for all core modules, but
443 	 * go to 200 MHz (max VDW = 192).
456 	/* Minimum 3 MHz, VDW = 4 */
458 	/* Maximum 50 MHz, VDW = 192 */
459 	.vd_max		= 50,
470 	/* Minimum 25 MHz */
472 	/* Maximum 33 MHz */