Lines Matching +full:2 +full:mhz

13 	UNIPHIER_CLK_FACTOR("sd-133m", -1, "vpll27a", 1, 2)
25 	UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
29 	UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
39 	UNIPHIER_CLK_GATE("emmc", (idx), NULL, 0x210c, 2)
74 	UNIPHIER_CLK_GATE("exiv", (idx), "exiv-io200m", 0x2110, 2)
83 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 65, 1),		/* 1597.44 MHz */
84 	UNIPHIER_CLK_FACTOR("upll", -1, "ref", 6000, 512),	/* 288 MHz */
85 	UNIPHIER_CLK_FACTOR("a2pll", -1, "ref", 24, 1),		/* 589.824 MHz */
86 	UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 5625, 512),	/* 270 MHz */
90 	UNIPHIER_LD4_SYS_CLK_NAND(2),
99 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 64, 1),		/* 1600 MHz */
100 	UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25),	/* 288 MHz */
101 	UNIPHIER_CLK_FACTOR("a2pll", -1, "upll", 256, 125),	/* 589.824 MHz */
102 	UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 270, 25),	/* 270 MHz */
103 	UNIPHIER_CLK_FACTOR("gpll", -1, "ref", 10, 1),		/* 250 MHz */
107 	UNIPHIER_LD4_SYS_CLK_NAND(2),
128 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 64, 1),		/* 1600 MHz */
129 	UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25),	/* 288 MHz */
130 	UNIPHIER_CLK_FACTOR("vpll27a", -1, "ref", 270, 25),	/* 270 MHz */
134 	UNIPHIER_LD4_SYS_CLK_NAND(2),
143 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 120, 1),		/* 2400 MHz */
144 	UNIPHIER_CLK_FACTOR("dapll1", -1, "ref", 128, 1),	/* 2560 MHz */
145 	UNIPHIER_CLK_FACTOR("dapll2", -1, "dapll1", 144, 125),	/* 2949.12 MHz */
149 	UNIPHIER_PRO5_SYS_CLK_NAND(2),
156 	UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x2108, 2),
162 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 96, 1),		/* 2400 MHz */
166 	UNIPHIER_PRO5_SYS_CLK_NAND(2),
186 	UNIPHIER_CLK_FACTOR("cpll", -1, "ref", 392, 5),		/* 1960 MHz */
187 	UNIPHIER_CLK_FACTOR("mpll", -1, "ref", 64, 1),		/* 1600 MHz */
188 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 80, 1),		/* 2000 MHz */
189 	UNIPHIER_CLK_FACTOR("vspll", -1, "ref", 80, 1),		/* 2000 MHz */
193 	UNIPHIER_LD11_SYS_CLK_NAND(2),
205 	UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8),
206 	UNIPHIER_CLK_DIV4("mpll", 2, 3, 4, 8),
210 			     "cpll/2", "spll/4", "cpll/3", "spll/3",
213 			     "mpll/2", "spll/4", "mpll/3", "spll/3",
219 	UNIPHIER_CLK_FACTOR("cpll", -1, "ref", 88, 1),		/* ARM: 2200 MHz */
220 	UNIPHIER_CLK_FACTOR("gppll", -1, "ref", 52, 1),		/* Mali: 1300 MHz */
221 	UNIPHIER_CLK_FACTOR("mpll", -1, "ref", 64, 1),		/* Codec: 1600 MHz */
222 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 80, 1),		/* 2000 MHz */
223 	UNIPHIER_CLK_FACTOR("s2pll", -1, "ref", 88, 1),		/* IPP: 2200 MHz */
224 	UNIPHIER_CLK_FACTOR("vppll", -1, "ref", 504, 5),	/* 2520 MHz */
228 	UNIPHIER_LD11_SYS_CLK_NAND(2),
251 	UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8),
252 	UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8),
253 	UNIPHIER_CLK_DIV4("s2pll", 2, 3, 4, 8),
255 			     "cpll/2", "spll/2", "cpll/3", "spll/3",
258 			     "cpll/2", "spll/2", "cpll/3", "spll/3",
261 			     "s2pll/2", "spll/2", "s2pll/3", "spll/3",
267 	UNIPHIER_CLK_FACTOR("cpll", -1, "ref", 104, 1),		/* ARM: 2600 MHz */
268 	UNIPHIER_CLK_FACTOR("spll", -1, "ref", 80, 1),		/* 2000 MHz */
269 	UNIPHIER_CLK_FACTOR("s2pll", -1, "ref", 88, 1),		/* IPP: 2400 MHz */
274 	UNIPHIER_LD11_SYS_CLK_NAND(2),
292 	UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8),
293 	UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8),
294 	UNIPHIER_CLK_DIV4("s2pll", 2, 3, 4, 8),
296 			     "cpll/2", "spll/2", "cpll/3", "spll/3",
299 			     "s2pll/2", "spll/2", "s2pll/3", "spll/3",