Lines Matching +full:clock +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/clk-provider.h>
14 #include "clk-uniphier.h"
20 switch (data->type) { in uniphier_clk_register()
22 return uniphier_clk_register_cpugear(dev, regmap, data->name, in uniphier_clk_register()
23 &data->data.cpugear); in uniphier_clk_register()
25 return uniphier_clk_register_fixed_factor(dev, data->name, in uniphier_clk_register()
26 &data->data.factor); in uniphier_clk_register()
28 return uniphier_clk_register_fixed_rate(dev, data->name, in uniphier_clk_register()
29 &data->data.rate); in uniphier_clk_register()
31 return uniphier_clk_register_gate(dev, regmap, data->name, in uniphier_clk_register()
32 &data->data.gate); in uniphier_clk_register()
34 return uniphier_clk_register_mux(dev, regmap, data->name, in uniphier_clk_register()
35 &data->data.mux); in uniphier_clk_register()
37 dev_err(dev, "unsupported clock type\n"); in uniphier_clk_register()
38 return ERR_PTR(-EINVAL); in uniphier_clk_register()
44 struct device *dev = &pdev->dev; in uniphier_clk_probe()
53 return -EINVAL; in uniphier_clk_probe()
55 parent = of_get_parent(dev->of_node); /* parent should be syscon node */ in uniphier_clk_probe()
64 for (p = data; p->name; p++) in uniphier_clk_probe()
65 clk_num = max(clk_num, p->idx + 1); in uniphier_clk_probe()
70 return -ENOMEM; in uniphier_clk_probe()
72 hw_data->num = clk_num; in uniphier_clk_probe()
75 while (--clk_num >= 0) in uniphier_clk_probe()
76 hw_data->hws[clk_num] = ERR_PTR(-EINVAL); in uniphier_clk_probe()
78 for (p = data; p->name; p++) { in uniphier_clk_probe()
81 dev_dbg(dev, "register %s (index=%d)\n", p->name, p->idx); in uniphier_clk_probe()
83 if (WARN(IS_ERR(hw), "failed to register %s", p->name)) in uniphier_clk_probe()
86 if (p->idx >= 0) in uniphier_clk_probe()
87 hw_data->hws[p->idx] = hw; in uniphier_clk_probe()
90 return of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, in uniphier_clk_probe()
96 of_clk_del_provider(pdev->dev.of_node); in uniphier_clk_remove()
102 /* System clock */
104 .compatible = "socionext,uniphier-ld4-clock",
108 .compatible = "socionext,uniphier-pro4-clock",
112 .compatible = "socionext,uniphier-sld8-clock",
116 .compatible = "socionext,uniphier-pro5-clock",
120 .compatible = "socionext,uniphier-pxs2-clock",
124 .compatible = "socionext,uniphier-ld11-clock",
128 .compatible = "socionext,uniphier-ld20-clock",
132 .compatible = "socionext,uniphier-pxs3-clock",
135 /* Media I/O clock, SD clock */
137 .compatible = "socionext,uniphier-ld4-mio-clock",
141 .compatible = "socionext,uniphier-pro4-mio-clock",
145 .compatible = "socionext,uniphier-sld8-mio-clock",
149 .compatible = "socionext,uniphier-pro5-sd-clock",
153 .compatible = "socionext,uniphier-pxs2-sd-clock",
157 .compatible = "socionext,uniphier-ld11-mio-clock",
161 .compatible = "socionext,uniphier-ld20-sd-clock",
165 .compatible = "socionext,uniphier-pxs3-sd-clock",
168 /* Peripheral clock */
170 .compatible = "socionext,uniphier-ld4-peri-clock",
174 .compatible = "socionext,uniphier-pro4-peri-clock",
178 .compatible = "socionext,uniphier-sld8-peri-clock",
182 .compatible = "socionext,uniphier-pro5-peri-clock",
186 .compatible = "socionext,uniphier-pxs2-peri-clock",
190 .compatible = "socionext,uniphier-ld11-peri-clock",
194 .compatible = "socionext,uniphier-ld20-peri-clock",
198 .compatible = "socionext,uniphier-pxs3-peri-clock",
208 .name = "uniphier-clk",