22 static const struct omap_clkctrl_reg_data dra7_mpu_clkctrl_regs[] __initconst = {
27 static const char * const dra7_mcasp1_aux_gfclk_mux_parents[] __initconst = {
35 static const char * const dra7_mcasp1_ahclkx_mux_parents[] __initconst = {
53 static const struct omap_clkctrl_bit_data dra7_mcasp1_bit_data[] __initconst = {
60 static const char * const dra7_timer5_gfclk_mux_parents[] __initconst = {
76 static const struct omap_clkctrl_bit_data dra7_timer5_bit_data[] __initconst = {
81 static const struct omap_clkctrl_bit_data dra7_timer6_bit_data[] __initconst = {
86 static const struct omap_clkctrl_bit_data dra7_timer7_bit_data[] __initconst = {
91 static const struct omap_clkctrl_bit_data dra7_timer8_bit_data[] __initconst = {
96 static const char * const dra7_uart6_gfclk_mux_parents[] __initconst = {
102 static const struct omap_clkctrl_bit_data dra7_uart6_bit_data[] __initconst = {
107 static const struct omap_clkctrl_reg_data dra7_ipu_clkctrl_regs[] __initconst = {
118 static const struct omap_clkctrl_reg_data dra7_rtc_clkctrl_regs[] __initconst = {
123 static const struct omap_clkctrl_reg_data dra7_coreaon_clkctrl_regs[] __initconst = {
129 static const struct omap_clkctrl_reg_data dra7_l3main1_clkctrl_regs[] __initconst = {
140 static const struct omap_clkctrl_reg_data dra7_dma_clkctrl_regs[] __initconst = {
145 static const struct omap_clkctrl_reg_data dra7_emif_clkctrl_regs[] __initconst = {
150 static const char * const dra7_atl_dpll_clk_mux_parents[] __initconst = {
158 static const char * const dra7_atl_gfclk_mux_parents[] __initconst = {
165 static const struct omap_clkctrl_bit_data dra7_atl_bit_data[] __initconst = {
171 static const struct omap_clkctrl_reg_data dra7_atl_clkctrl_regs[] __initconst = {
176 static const struct omap_clkctrl_reg_data dra7_l4cfg_clkctrl_regs[] __initconst = {
195 static const struct omap_clkctrl_reg_data dra7_l3instr_clkctrl_regs[] __initconst = {
201 static const char * const dra7_dss_dss_clk_parents[] __initconst = {
206 static const char * const dra7_dss_48mhz_clk_parents[] __initconst = {
211 static const char * const dra7_dss_hdmi_clk_parents[] __initconst = {
216 static const char * const dra7_dss_32khz_clk_parents[] __initconst = {
221 static const char * const dra7_dss_video1_clk_parents[] __initconst = {
226 static const char * const dra7_dss_video2_clk_parents[] __initconst = {
231 static const struct omap_clkctrl_bit_data dra7_dss_core_bit_data[] __initconst = {
241 static const struct omap_clkctrl_reg_data dra7_dss_clkctrl_regs[] __initconst = {
247 static const char * const dra7_mmc1_fclk_mux_parents[] __initconst = {
253 static const char * const dra7_mmc1_fclk_div_parents[] __initconst = {
258 static const struct omap_clkctrl_div_data dra7_mmc1_fclk_div_data __initconst = {  variable
263 static const struct omap_clkctrl_bit_data dra7_mmc1_bit_data[] __initconst = {
270 static const char * const dra7_mmc2_fclk_div_parents[] __initconst = {
275 static const struct omap_clkctrl_div_data dra7_mmc2_fclk_div_data __initconst = {  variable
280 static const struct omap_clkctrl_bit_data dra7_mmc2_bit_data[] __initconst = {
287 static const char * const dra7_usb_otg_ss2_refclk960m_parents[] __initconst = {
292 static const struct omap_clkctrl_bit_data dra7_usb_otg_ss2_bit_data[] __initconst = {
297 static const char * const dra7_sata_ref_clk_parents[] __initconst = {
302 static const struct omap_clkctrl_bit_data dra7_sata_bit_data[] __initconst = {
307 static const char * const dra7_optfclk_pciephy1_clk_parents[] __initconst = {
312 static const char * const dra7_optfclk_pciephy1_div_clk_parents[] __initconst = {
317 static const struct omap_clkctrl_bit_data dra7_pcie1_bit_data[] __initconst = {
324 static const struct omap_clkctrl_bit_data dra7_pcie2_bit_data[] __initconst = {
331 static const char * const dra7_rmii_50mhz_clk_mux_parents[] __initconst = {
337 static const char * const dra7_gmac_rft_clk_mux_parents[] __initconst = {
346 static const struct omap_clkctrl_bit_data dra7_gmac_bit_data[] __initconst = {
352 static const struct omap_clkctrl_bit_data dra7_usb_otg_ss1_bit_data[] __initconst = {
357 static const struct omap_clkctrl_reg_data dra7_l3init_clkctrl_regs[] __initconst = {
373 static const char * const dra7_timer10_gfclk_mux_parents[] __initconst = {
388 static const struct omap_clkctrl_bit_data dra7_timer10_bit_data[] __initconst = {
393 static const struct omap_clkctrl_bit_data dra7_timer11_bit_data[] __initconst = {
398 static const struct omap_clkctrl_bit_data dra7_timer2_bit_data[] __initconst = {
403 static const struct omap_clkctrl_bit_data dra7_timer3_bit_data[] __initconst = {
408 static const struct omap_clkctrl_bit_data dra7_timer4_bit_data[] __initconst = {
413 static const struct omap_clkctrl_bit_data dra7_timer9_bit_data[] __initconst = {
418 static const struct omap_clkctrl_bit_data dra7_gpio2_bit_data[] __initconst = {
423 static const struct omap_clkctrl_bit_data dra7_gpio3_bit_data[] __initconst = {
428 static const struct omap_clkctrl_bit_data dra7_gpio4_bit_data[] __initconst = {
433 static const struct omap_clkctrl_bit_data dra7_gpio5_bit_data[] __initconst = {
438 static const struct omap_clkctrl_bit_data dra7_gpio6_bit_data[] __initconst = {
443 static const struct omap_clkctrl_bit_data dra7_timer13_bit_data[] __initconst = {
448 static const struct omap_clkctrl_bit_data dra7_timer14_bit_data[] __initconst = {
453 static const struct omap_clkctrl_bit_data dra7_timer15_bit_data[] __initconst = {
458 static const struct omap_clkctrl_bit_data dra7_gpio7_bit_data[] __initconst = {
463 static const struct omap_clkctrl_bit_data dra7_gpio8_bit_data[] __initconst = {
468 static const char * const dra7_mmc3_gfclk_div_parents[] __initconst = {
473 static const struct omap_clkctrl_div_data dra7_mmc3_gfclk_div_data __initconst = {  variable
478 static const struct omap_clkctrl_bit_data dra7_mmc3_bit_data[] __initconst = {
485 static const char * const dra7_mmc4_gfclk_div_parents[] __initconst = {
490 static const struct omap_clkctrl_div_data dra7_mmc4_gfclk_div_data __initconst = {  variable
495 static const struct omap_clkctrl_bit_data dra7_mmc4_bit_data[] __initconst = {
502 static const struct omap_clkctrl_bit_data dra7_timer16_bit_data[] __initconst = {
507 static const char * const dra7_qspi_gfclk_mux_parents[] __initconst = {
513 static const char * const dra7_qspi_gfclk_div_parents[] __initconst = {
518 static const struct omap_clkctrl_div_data dra7_qspi_gfclk_div_data __initconst = {  variable
523 static const struct omap_clkctrl_bit_data dra7_qspi_bit_data[] __initconst = {
529 static const struct omap_clkctrl_bit_data dra7_uart1_bit_data[] __initconst = {
534 static const struct omap_clkctrl_bit_data dra7_uart2_bit_data[] __initconst = {
539 static const struct omap_clkctrl_bit_data dra7_uart3_bit_data[] __initconst = {
544 static const struct omap_clkctrl_bit_data dra7_uart4_bit_data[] __initconst = {
549 static const struct omap_clkctrl_bit_data dra7_mcasp2_bit_data[] __initconst = {
556 static const struct omap_clkctrl_bit_data dra7_mcasp3_bit_data[] __initconst = {
562 static const struct omap_clkctrl_bit_data dra7_uart5_bit_data[] __initconst = {
567 static const struct omap_clkctrl_bit_data dra7_mcasp5_bit_data[] __initconst = {
573 static const struct omap_clkctrl_bit_data dra7_mcasp8_bit_data[] __initconst = {
579 static const struct omap_clkctrl_bit_data dra7_mcasp4_bit_data[] __initconst = {
585 static const struct omap_clkctrl_bit_data dra7_uart7_bit_data[] __initconst = {
590 static const struct omap_clkctrl_bit_data dra7_uart8_bit_data[] __initconst = {
595 static const struct omap_clkctrl_bit_data dra7_uart9_bit_data[] __initconst = {
600 static const struct omap_clkctrl_bit_data dra7_mcasp6_bit_data[] __initconst = {
606 static const struct omap_clkctrl_bit_data dra7_mcasp7_bit_data[] __initconst = {
612 static const struct omap_clkctrl_reg_data dra7_l4per_clkctrl_regs[] __initconst = {
673 static const struct omap_clkctrl_bit_data dra7_gpio1_bit_data[] __initconst = {
678 static const struct omap_clkctrl_bit_data dra7_timer1_bit_data[] __initconst = {
683 static const struct omap_clkctrl_bit_data dra7_uart10_bit_data[] __initconst = {
688 static const char * const dra7_dcan1_sys_clk_mux_parents[] __initconst = {
694 static const struct omap_clkctrl_bit_data dra7_dcan1_bit_data[] __initconst = {
699 static const struct omap_clkctrl_reg_data dra7_wkupaon_clkctrl_regs[] __initconst = {
712 const struct omap_clkctrl_data dra7_clkctrl_compat_data[] __initconst = {