230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
302 	lock_addr = pll->clk_base;  in clk_pll_wait_for_lock()
999 	val = readl(pll->clk_base + PLLE_SS_CTRL);  in clk_plle_enable()
1002 	writel(val, pll->clk_base + PLLE_SS_CTRL);  in clk_plle_enable()
1158 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_enable()
1168 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_enable()
1170 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_enable()
1180 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_enable()
1264 			       void __iomem *clk_base,  in _setup_dynamic_ramp()  argument
1294 	writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg);  in _setup_dynamic_ramp()
1783 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_tegra114_enable()
1793 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_tegra114_enable()
1795 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1806 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1809 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1813 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1815 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1818 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1826 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1829 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1834 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1836 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1862 		fence_udelay(1, pll->clk_base);  in _clk_plle_tegra_init_parent()
1867 static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,  in _tegra_init_pll()  argument
1877 	pll->clk_base = clk_base;  in _tegra_init_pll()
1919 		void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pll()  argument
1928 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pll()
1950 		void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_plle()  argument
1962 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_plle()
1975 		void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllu()  argument
1983 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllu()
2041 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllxc()  argument
2076 		err = _setup_dynamic_ramp(pll_params, clk_base, parent_rate);  in tegra_clk_register_pllxc()
2080 		val = readl_relaxed(clk_base + pll_params->base_reg);  in tegra_clk_register_pllxc()
2081 		val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllxc()
2088 				       clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllxc()
2092 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllxc()
2105 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllre()  argument
2120 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllre()
2128 		WARN_ON(readl_relaxed(clk_base + pll_params->iddq_reg) &  in tegra_clk_register_pllre()
2154 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllm()  argument
2183 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllm()
2196 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllc()  argument
2222 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllc()
2271 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_plle_tegra114()  argument
2278 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_plle_tegra114()
2294 				 void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllu_tegra114()  argument
2303 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllu_tegra114()
2328 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllss()  argument
2349 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllss()
2383 	val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllss()
2392 		writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllss()
2410 			  const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllre_tegra210()  argument
2424 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllre_tegra210()
2586 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_plle_tegra210()  argument
2593 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_plle_tegra210()
2608 			const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllc_tegra210()  argument
2637 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllc_tegra210()
2650 				const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllss_tegra210()  argument
2670 	val = readl_relaxed(clk_base + pll_params->base_reg);  in tegra_clk_register_pllss_tegra210()
2685 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllss_tegra210()
2699 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllmb()  argument
2728 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllmb()