21 static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,  in get_div()  argument
26 	div = div_frac_get(rate, parent_rate, divider->width,  in get_div()
27 			   divider->frac_width, divider->flags);  in get_div()
38 	struct tegra_clk_frac_div *divider = to_clk_frac_div(hw);  in clk_frac_div_recalc_rate()  local
43 	reg = readl_relaxed(divider->reg);  in clk_frac_div_recalc_rate()
45 	if ((divider->flags & TEGRA_DIVIDER_UART) &&  in clk_frac_div_recalc_rate()
49 	div = (reg >> divider->shift) & div_mask(divider);  in clk_frac_div_recalc_rate()
51 	mul = get_mul(divider);  in clk_frac_div_recalc_rate()
64 	struct tegra_clk_frac_div *divider = to_clk_frac_div(hw);  in clk_frac_div_round_rate()  local
71 	div = get_div(divider, rate, output_rate);  in clk_frac_div_round_rate()
75 	mul = get_mul(divider);  in clk_frac_div_round_rate()
83 	struct tegra_clk_frac_div *divider = to_clk_frac_div(hw);  in clk_frac_div_set_rate()  local
88 	div = get_div(divider, rate, parent_rate);  in clk_frac_div_set_rate()
92 	if (divider->lock)  in clk_frac_div_set_rate()
93 		spin_lock_irqsave(divider->lock, flags);  in clk_frac_div_set_rate()
95 	val = readl_relaxed(divider->reg);  in clk_frac_div_set_rate()
96 	val &= ~(div_mask(divider) << divider->shift);  in clk_frac_div_set_rate()
97 	val |= div << divider->shift;  in clk_frac_div_set_rate()
99 	if (divider->flags & TEGRA_DIVIDER_UART) {  in clk_frac_div_set_rate()
106 	if (divider->flags & TEGRA_DIVIDER_FIXED)  in clk_frac_div_set_rate()
107 		val |= pll_out_override(divider);  in clk_frac_div_set_rate()
109 	writel_relaxed(val, divider->reg);  in clk_frac_div_set_rate()
111 	if (divider->lock)  in clk_frac_div_set_rate()
112 		spin_unlock_irqrestore(divider->lock, flags);  in clk_frac_div_set_rate()
139 	struct tegra_clk_frac_div *divider;  in tegra_clk_register_divider()  local
143 	divider = kzalloc(sizeof(*divider), GFP_KERNEL);  in tegra_clk_register_divider()
144 	if (!divider) {  in tegra_clk_register_divider()
145 		pr_err("%s: could not allocate fractional divider clk\n",  in tegra_clk_register_divider()
156 	divider->reg = reg;  in tegra_clk_register_divider()
157 	divider->shift = shift;  in tegra_clk_register_divider()
158 	divider->width = width;  in tegra_clk_register_divider()
159 	divider->frac_width = frac_width;  in tegra_clk_register_divider()
160 	divider->lock = lock;  in tegra_clk_register_divider()
161 	divider->flags = clk_divider_flags;  in tegra_clk_register_divider()
164 	divider->hw.init = &init;  in tegra_clk_register_divider()
166 	clk = clk_register(NULL, &divider->hw);  in tegra_clk_register_divider()
168 		kfree(divider);  in tegra_clk_register_divider()