1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2014 Chen-Yu Tsai
5  * Chen-Yu Tsai <wens@csie.org>
9 #include <linux/clk-provider.h>
14 #include "clk-factors.h"
18  * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL4
20  * rate = (parent_rate * n >> p) / (m + 1);
23  * p and m are named div1 and div2 in Allwinner's SDK
29 	int m = 1;  in sun9i_a80_get_pll4_factors()  local
33 	n = DIV_ROUND_UP(req->rate, 6000000);  in sun9i_a80_get_pll4_factors()
37 		m = 0;  in sun9i_a80_get_pll4_factors()
53 	req->rate = ((24000000 * n) >> p) / (m + 1);  in sun9i_a80_get_pll4_factors()
54 	req->n = n;  in sun9i_a80_get_pll4_factors()
55 	req->m = m;  in sun9i_a80_get_pll4_factors()
56 	req->p = p;  in sun9i_a80_get_pll4_factors()
82 		pr_err("Could not get registers for a80-pll4-clk: %pOFn\n",  in sun9i_a80_pll4_setup()
90 CLK_OF_DECLARE(sun9i_a80_pll4, "allwinner,sun9i-a80-pll4-clk", sun9i_a80_pll4_setup);
94  * sun9i_a80_get_gt_factors() - calculates m factor for GT
96  * rate = parent_rate / (m + 1);
103 	if (req->parent_rate < req->rate)  in sun9i_a80_get_gt_factors()
104 		req->rate = req->parent_rate;  in sun9i_a80_get_gt_factors()
106 	div = DIV_ROUND_UP(req->parent_rate, req->rate);  in sun9i_a80_get_gt_factors()
112 	req->rate = req->parent_rate / div;  in sun9i_a80_get_gt_factors()
113 	req->m = div;  in sun9i_a80_get_gt_factors()
136 		pr_err("Could not get registers for a80-gt-clk: %pOFn\n",  in sun9i_a80_gt_setup()
145 CLK_OF_DECLARE(sun9i_a80_gt, "allwinner,sun9i-a80-gt-clk", sun9i_a80_gt_setup);
149  * sun9i_a80_get_ahb_factors() - calculates p factor for AHB0/1/2
150  * AHB rate is calculated as follows
158 	if (req->parent_rate < req->rate)  in sun9i_a80_get_ahb_factors()
159 		req->rate = req->parent_rate;  in sun9i_a80_get_ahb_factors()
161 	_p = order_base_2(DIV_ROUND_UP(req->parent_rate, req->rate));  in sun9i_a80_get_ahb_factors()
167 	req->rate = req->parent_rate >> _p;  in sun9i_a80_get_ahb_factors()
168 	req->p = _p;  in sun9i_a80_get_ahb_factors()
191 		pr_err("Could not get registers for a80-ahb-clk: %pOFn\n",  in sun9i_a80_ahb_setup()
199 CLK_OF_DECLARE(sun9i_a80_ahb, "allwinner,sun9i-a80-ahb-clk", sun9i_a80_ahb_setup);
217 		pr_err("Could not get registers for a80-apb0-clk: %pOFn\n",  in sun9i_a80_apb0_setup()
225 CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-clk", sun9i_a80_apb0_setup);
229  * sun9i_a80_get_apb1_factors() - calculates m, p factors for APB1
231  * rate = (parent_rate >> p) / (m + 1);
238 	if (req->parent_rate < req->rate)  in sun9i_a80_get_apb1_factors()
239 		req->rate = req->parent_rate;  in sun9i_a80_get_apb1_factors()
241 	div = DIV_ROUND_UP(req->parent_rate, req->rate);  in sun9i_a80_get_apb1_factors()
243 	/* Highest possible divider is 256 (p = 3, m = 31) */  in sun9i_a80_get_apb1_factors()
247 	req->p = order_base_2(div);  in sun9i_a80_get_apb1_factors()
248 	req->m = (req->parent_rate >> req->p) - 1;  in sun9i_a80_get_apb1_factors()
249 	req->rate = (req->parent_rate >> req->p) / (req->m + 1);  in sun9i_a80_get_apb1_factors()
274 		pr_err("Could not get registers for a80-apb1-clk: %pOFn\n",  in sun9i_a80_apb1_setup()
282 CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-clk", sun9i_a80_apb1_setup);