Lines Matching +full:m +full:- +full:ahb
1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
24 #include "ccu-suniv-f1c100s.h"
32 .m = _SUNXI_CCU_DIV(0, 2),
38 .hw.init = CLK_HW_INIT("pll-cpu", "osc24M",
54 static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
57 0, 5, /* M */
62 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
65 0, 4, /* M */
74 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
77 0, 4, /* M */
86 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr",
90 0, 2, /* M */
102 .hw.init = CLK_HW_INIT("pll-periph", "osc24M",
108 "pll-cpu", "pll-cpu" };
113 "cpu", "pll-periph" };
131 .hw.init = CLK_HW_INIT_PARENTS("ahb",
145 static SUNXI_CCU_DIV_TABLE(apb_clk, "apb", "ahb",
148 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "ahb",
150 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb",
152 static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb",
154 static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "ahb",
156 static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb",
158 static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "ahb",
160 static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb",
163 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb",
165 static SUNXI_CCU_GATE(bus_lcd_clk, "bus-lcd", "ahb",
167 static SUNXI_CCU_GATE(bus_deinterlace_clk, "bus-deinterlace", "ahb",
169 static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb",
171 static SUNXI_CCU_GATE(bus_tvd_clk, "bus-tvd", "ahb",
173 static SUNXI_CCU_GATE(bus_tve_clk, "bus-tve", "ahb",
175 static SUNXI_CCU_GATE(bus_de_be_clk, "bus-de-be", "ahb",
177 static SUNXI_CCU_GATE(bus_de_fe_clk, "bus-de-fe", "ahb",
180 static SUNXI_CCU_GATE(bus_codec_clk, "bus-codec", "apb",
182 static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", "apb",
184 static SUNXI_CCU_GATE(bus_ir_clk, "bus-ir", "apb",
186 static SUNXI_CCU_GATE(bus_rsb_clk, "bus-rsb", "apb",
188 static SUNXI_CCU_GATE(bus_i2s0_clk, "bus-i2s0", "apb",
190 static SUNXI_CCU_GATE(bus_i2c0_clk, "bus-i2c0", "apb",
192 static SUNXI_CCU_GATE(bus_i2c1_clk, "bus-i2c1", "apb",
194 static SUNXI_CCU_GATE(bus_i2c2_clk, "bus-i2c2", "apb",
196 static SUNXI_CCU_GATE(bus_pio_clk, "bus-pio", "apb",
198 static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb",
200 static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb",
202 static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb",
205 static const char * const mod0_default_parents[] = { "osc24M", "pll-periph" };
207 0, 4, /* M */
219 0, 4, /* M */
230 static const char * const i2s_spdif_parents[] = { "pll-audio-8x",
231 "pll-audio-4x",
232 "pll-audio-2x",
233 "pll-audio" };
243 static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M",
246 static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "pll-ddr",
248 static SUNXI_CCU_GATE(dram_csi_clk, "dram-csi", "pll-ddr",
250 static SUNXI_CCU_GATE(dram_deinterlace_clk, "dram-deinterlace",
251 "pll-ddr", 0x100, BIT(2), 0);
252 static SUNXI_CCU_GATE(dram_tvd_clk, "dram-tvd", "pll-ddr",
254 static SUNXI_CCU_GATE(dram_de_fe_clk, "dram-de-fe", "pll-ddr",
256 static SUNXI_CCU_GATE(dram_de_be_clk, "dram-de-be", "pll-ddr",
259 static const char * const de_parents[] = { "pll-video", "pll-periph" };
261 static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(de_be_clk, "de-be",
265 static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(de_fe_clk, "de-fe",
269 static const char * const tcon_parents[] = { "pll-video", "pll-video-2x" };
276 static const char * const deinterlace_parents[] = { "pll-video",
277 "pll-video-2x" };
283 static const char * const tve_clk2_parents[] = { "pll-video",
284 "pll-video-2x" };
286 static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(tve_clk2_clk, "tve-clk2",
289 static SUNXI_CCU_M_WITH_GATE(tve_clk1_clk, "tve-clk1", "tve-clk2",
292 static const char * const tvd_parents[] = { "pll-video", "osc24M",
293 "pll-video-2x" };
297 static const char * const csi_parents[] = { "pll-video", "osc24M" };
303 * TODO: BSP says the parent is pll-audio, however common sense and experience
304 * told us it should be pll-ve. pll-ve is totally not used in BSP code.
306 static SUNXI_CCU_GATE(ve_clk, "ve", "pll-audio", 0x13c, BIT(31), 0);
308 static SUNXI_CCU_GATE(codec_clk, "codec", "pll-audio", 0x140, BIT(31), 0);
381 static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
384 static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
387 static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",
390 static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",
393 static CLK_FIXED_FACTOR_HW(pll_video_2x_clk, "pll-video-2x",
536 /* Force the PLL-Audio-1x divider to 4 */ in suniv_f1c100s_ccu_setup()
550 CLK_OF_DECLARE(suniv_f1c100s_ccu, "allwinner,suniv-f1c100s-ccu",