Lines Matching refs:SUNXI_CCU_GATE
212 static SUNXI_CCU_GATE(hosc_clk, "hosc", "osc24M", 0x050, BIT(0), 0);
290 static SUNXI_CCU_GATE(axi_dram_clk, "axi-dram", "ahb",
293 static SUNXI_CCU_GATE(ahb_otg_clk, "ahb-otg", "ahb",
295 static SUNXI_CCU_GATE(ahb_ehci0_clk, "ahb-ehci0", "ahb",
297 static SUNXI_CCU_GATE(ahb_ohci0_clk, "ahb-ohci0", "ahb",
299 static SUNXI_CCU_GATE(ahb_ehci1_clk, "ahb-ehci1", "ahb",
301 static SUNXI_CCU_GATE(ahb_ohci1_clk, "ahb-ohci1", "ahb",
303 static SUNXI_CCU_GATE(ahb_ss_clk, "ahb-ss", "ahb",
305 static SUNXI_CCU_GATE(ahb_dma_clk, "ahb-dma", "ahb",
307 static SUNXI_CCU_GATE(ahb_bist_clk, "ahb-bist", "ahb",
309 static SUNXI_CCU_GATE(ahb_mmc0_clk, "ahb-mmc0", "ahb",
311 static SUNXI_CCU_GATE(ahb_mmc1_clk, "ahb-mmc1", "ahb",
313 static SUNXI_CCU_GATE(ahb_mmc2_clk, "ahb-mmc2", "ahb",
315 static SUNXI_CCU_GATE(ahb_mmc3_clk, "ahb-mmc3", "ahb",
317 static SUNXI_CCU_GATE(ahb_ms_clk, "ahb-ms", "ahb",
319 static SUNXI_CCU_GATE(ahb_nand_clk, "ahb-nand", "ahb",
321 static SUNXI_CCU_GATE(ahb_sdram_clk, "ahb-sdram", "ahb",
324 static SUNXI_CCU_GATE(ahb_ace_clk, "ahb-ace", "ahb",
326 static SUNXI_CCU_GATE(ahb_emac_clk, "ahb-emac", "ahb",
328 static SUNXI_CCU_GATE(ahb_ts_clk, "ahb-ts", "ahb",
330 static SUNXI_CCU_GATE(ahb_spi0_clk, "ahb-spi0", "ahb",
332 static SUNXI_CCU_GATE(ahb_spi1_clk, "ahb-spi1", "ahb",
334 static SUNXI_CCU_GATE(ahb_spi2_clk, "ahb-spi2", "ahb",
336 static SUNXI_CCU_GATE(ahb_spi3_clk, "ahb-spi3", "ahb",
338 static SUNXI_CCU_GATE(ahb_pata_clk, "ahb-pata", "ahb",
341 static SUNXI_CCU_GATE(ahb_sata_clk, "ahb-sata", "ahb",
344 static SUNXI_CCU_GATE(ahb_gps_clk, "ahb-gps", "ahb",
347 static SUNXI_CCU_GATE(ahb_hstimer_clk, "ahb-hstimer", "ahb",
350 static SUNXI_CCU_GATE(ahb_ve_clk, "ahb-ve", "ahb",
352 static SUNXI_CCU_GATE(ahb_tvd_clk, "ahb-tvd", "ahb",
354 static SUNXI_CCU_GATE(ahb_tve0_clk, "ahb-tve0", "ahb",
356 static SUNXI_CCU_GATE(ahb_tve1_clk, "ahb-tve1", "ahb",
358 static SUNXI_CCU_GATE(ahb_lcd0_clk, "ahb-lcd0", "ahb",
360 static SUNXI_CCU_GATE(ahb_lcd1_clk, "ahb-lcd1", "ahb",
362 static SUNXI_CCU_GATE(ahb_csi0_clk, "ahb-csi0", "ahb",
364 static SUNXI_CCU_GATE(ahb_csi1_clk, "ahb-csi1", "ahb",
367 static SUNXI_CCU_GATE(ahb_hdmi1_clk, "ahb-hdmi1", "ahb",
369 static SUNXI_CCU_GATE(ahb_hdmi0_clk, "ahb-hdmi0", "ahb",
371 static SUNXI_CCU_GATE(ahb_de_be0_clk, "ahb-de-be0", "ahb",
373 static SUNXI_CCU_GATE(ahb_de_be1_clk, "ahb-de-be1", "ahb",
375 static SUNXI_CCU_GATE(ahb_de_fe0_clk, "ahb-de-fe0", "ahb",
377 static SUNXI_CCU_GATE(ahb_de_fe1_clk, "ahb-de-fe1", "ahb",
380 static SUNXI_CCU_GATE(ahb_gmac_clk, "ahb-gmac", "ahb",
382 static SUNXI_CCU_GATE(ahb_mp_clk, "ahb-mp", "ahb",
384 static SUNXI_CCU_GATE(ahb_gpu_clk, "ahb-gpu", "ahb",
387 static SUNXI_CCU_GATE(apb0_codec_clk, "apb0-codec", "apb0",
389 static SUNXI_CCU_GATE(apb0_spdif_clk, "apb0-spdif", "apb0",
391 static SUNXI_CCU_GATE(apb0_ac97_clk, "apb0-ac97", "apb0",
393 static SUNXI_CCU_GATE(apb0_i2s0_clk, "apb0-i2s0", "apb0",
396 static SUNXI_CCU_GATE(apb0_i2s1_clk, "apb0-i2s1", "apb0",
398 static SUNXI_CCU_GATE(apb0_pio_clk, "apb0-pio", "apb0",
400 static SUNXI_CCU_GATE(apb0_ir0_clk, "apb0-ir0", "apb0",
402 static SUNXI_CCU_GATE(apb0_ir1_clk, "apb0-ir1", "apb0",
405 static SUNXI_CCU_GATE(apb0_i2s2_clk, "apb0-i2s2", "apb0",
407 static SUNXI_CCU_GATE(apb0_keypad_clk, "apb0-keypad", "apb0",
410 static SUNXI_CCU_GATE(apb1_i2c0_clk, "apb1-i2c0", "apb1",
412 static SUNXI_CCU_GATE(apb1_i2c1_clk, "apb1-i2c1", "apb1",
414 static SUNXI_CCU_GATE(apb1_i2c2_clk, "apb1-i2c2", "apb1",
417 static SUNXI_CCU_GATE(apb1_i2c3_clk, "apb1-i2c3", "apb1",
419 static SUNXI_CCU_GATE(apb1_can_clk, "apb1-can", "apb1",
421 static SUNXI_CCU_GATE(apb1_scr_clk, "apb1-scr", "apb1",
423 static SUNXI_CCU_GATE(apb1_ps20_clk, "apb1-ps20", "apb1",
425 static SUNXI_CCU_GATE(apb1_ps21_clk, "apb1-ps21", "apb1",
428 static SUNXI_CCU_GATE(apb1_i2c4_clk, "apb1-i2c4", "apb1",
430 static SUNXI_CCU_GATE(apb1_uart0_clk, "apb1-uart0", "apb1",
432 static SUNXI_CCU_GATE(apb1_uart1_clk, "apb1-uart1", "apb1",
434 static SUNXI_CCU_GATE(apb1_uart2_clk, "apb1-uart2", "apb1",
436 static SUNXI_CCU_GATE(apb1_uart3_clk, "apb1-uart3", "apb1",
438 static SUNXI_CCU_GATE(apb1_uart4_clk, "apb1-uart4", "apb1",
440 static SUNXI_CCU_GATE(apb1_uart5_clk, "apb1-uart5", "apb1",
442 static SUNXI_CCU_GATE(apb1_uart6_clk, "apb1-uart6", "apb1",
444 static SUNXI_CCU_GATE(apb1_uart7_clk, "apb1-uart7", "apb1",
629 static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "pll-periph",
631 static SUNXI_CCU_GATE(usb_ohci1_clk, "usb-ohci1", "pll-periph",
633 static SUNXI_CCU_GATE(usb_phy_clk, "usb-phy", "pll-periph",
653 static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "pll-ddr",
655 static SUNXI_CCU_GATE(dram_csi0_clk, "dram-csi0", "pll-ddr",
657 static SUNXI_CCU_GATE(dram_csi1_clk, "dram-csi1", "pll-ddr",
659 static SUNXI_CCU_GATE(dram_ts_clk, "dram-ts", "pll-ddr",
661 static SUNXI_CCU_GATE(dram_tvd_clk, "dram-tvd", "pll-ddr",
663 static SUNXI_CCU_GATE(dram_tve0_clk, "dram-tve0", "pll-ddr",
665 static SUNXI_CCU_GATE(dram_tve1_clk, "dram-tve1", "pll-ddr",
669 static SUNXI_CCU_GATE(dram_out_clk, "dram-out", "pll-ddr",
671 static SUNXI_CCU_GATE(dram_de_fe1_clk, "dram-de-fe1", "pll-ddr",
673 static SUNXI_CCU_GATE(dram_de_fe0_clk, "dram-de-fe0", "pll-ddr",
675 static SUNXI_CCU_GATE(dram_de_be0_clk, "dram-de-be0", "pll-ddr",
677 static SUNXI_CCU_GATE(dram_de_be1_clk, "dram-de-be1", "pll-ddr",
679 static SUNXI_CCU_GATE(dram_mp_clk, "dram-mp", "pll-ddr",
681 static SUNXI_CCU_GATE(dram_ace_clk, "dram-ace", "pll-ddr",
767 static SUNXI_CCU_GATE(codec_clk, "codec", "pll-audio",
770 static SUNXI_CCU_GATE(avs_clk, "avs", "hosc", 0x144, BIT(31), 0);
807 static SUNXI_CCU_GATE(hdmi1_slow_clk, "hdmi1-slow", "hosc", 0x178, BIT(31), 0);