Lines Matching refs:PERIP1_CLK_ENB

52 #define PERIP1_CLK_ENB			(misc_base + 0x02C)  macro
402 PERIP1_CLK_ENB, RTC_CLK_ENB, 0, &_lock); in spear3xx_clk_init()
450 CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, UART_CLK_ENB, 0, in spear3xx_clk_init()
468 CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, in spear3xx_clk_init()
489 CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, in spear3xx_clk_init()
501 CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, in spear3xx_clk_init()
537 clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
551 clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
574 clk = clk_register_gate(NULL, "c3_clk", "ahb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
578 clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
582 clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
586 clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
590 clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
594 clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
599 clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
603 clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()
607 clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB, in spear3xx_clk_init()