1 /* SPDX-License-Identifier: GPL-2.0-only */
7  * Common Clock Framework support for all Samsung platforms
13 #include <linux/clk-provider.h>
14 #include "clk-pll.h"
17  * struct samsung_clk_provider: information about clock provider
19  * @lock: maintains exclusion between callbacks for a given clock-provider.
20  * @clk_data: holds clock related data like clk_hw* and number of clocks.
31  * struct samsung_clock_alias: information about mux clock
32  * @id: platform specific id of the clock.
33  * @dev_name: name of the device to which this clock belongs.
34  * @alias: optional clock alias name to be assigned to this clock.
52  * struct samsung_fixed_rate_clock: information about fixed-rate clock
53  * @id: platform specific id of the clock.
54  * @name: name of this fixed-rate clock.
55  * @parent_name: optional parent clock name.
56  * @flags: optional fixed-rate clock flags.
57  * @fixed-rate: fixed clock rate of this clock.
61 	char			*name;  member
70 		.name		= cname,		\
77  * struct samsung_fixed_factor_clock: information about fixed-factor clock
78  * @id: platform specific id of the clock.
79  * @name: name of this fixed-factor clock.
80  * @parent_name: parent clock name.
83  * @flags: optional fixed-factor clock flags.
87 	char			*name;  member
97 		.name		= cname,		\
105  * struct samsung_mux_clock: information about mux clock
106  * @id: platform specific id of the clock.
107  * @name: name of this mux clock.
108  * @parent_names: array of pointer to parent clock names.
110  * @flags: optional flags for basic clock.
112  * @shift: starting bit location of the mux control bit-field in @reg.
113  * @width: width of the mux control bit-field in @reg.
114  * @mux_flags: flags for mux-type clock.
118 	const char		*name;  member
131 		.name		= cname,			\
148  * @id: platform specific id of the clock.
149  * struct samsung_div_clock: information about div clock
150  * @name: name of this div clock.
151  * @parent_name: name of the parent clock.
152  * @flags: optional flags for basic clock.
154  * @shift: starting bit location of the div control bit-field in @reg.
155  * @div_flags: flags for div-type clock.
159 	const char		*name;  member
172 		.name		= cname,			\
192  * struct samsung_gate_clock: information about gate clock
193  * @id: platform specific id of the clock.
194  * @name: name of this gate clock.
195  * @parent_name: name of the parent clock.
196  * @flags: optional flags for basic clock.
198  * @bit_idx: bit index of the gate control bit-field in @reg.
199  * @gate_flags: flags for gate-type clock.
203 	const char		*name;  member
214 		.name		= cname,			\
228  * struct samsung_clk_reg_dump: register dump of clock controller registers.
229  * @offset: clock register offset from the controller base address.
238  * struct samsung_pll_clock: information about pll clock
239  * @id: platform specific id of the clock.
240  * @name: name of this pll clock.
241  * @parent_name: name of the parent clock.
242  * @flags: optional flags for basic clock.
249 	const char		*name;  member
262 		.name		= _name,				\
312 	/* name of the parent clock needed for CMU register access */