Lines Matching refs:sc

54 static int gdsc_check_status(struct gdsc *sc, enum gdsc_status status)  in gdsc_check_status()  argument
60 if (sc->flags & POLL_CFG_GDSCR) in gdsc_check_status()
61 reg = sc->gdscr + CFG_GDSCR_OFFSET; in gdsc_check_status()
62 else if (sc->gds_hw_ctrl) in gdsc_check_status()
63 reg = sc->gds_hw_ctrl; in gdsc_check_status()
65 reg = sc->gdscr; in gdsc_check_status()
67 ret = regmap_read(sc->regmap, reg, &val); in gdsc_check_status()
71 if (sc->flags & POLL_CFG_GDSCR) { in gdsc_check_status()
90 static int gdsc_hwctrl(struct gdsc *sc, bool en) in gdsc_hwctrl() argument
94 return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val); in gdsc_hwctrl()
97 static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status) in gdsc_poll_status() argument
103 if (gdsc_check_status(sc, status)) in gdsc_poll_status()
107 if (gdsc_check_status(sc, status)) in gdsc_poll_status()
113 static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) in gdsc_toggle_logic() argument
118 if (status == GDSC_ON && sc->rsupply) { in gdsc_toggle_logic()
119 ret = regulator_enable(sc->rsupply); in gdsc_toggle_logic()
124 ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val); in gdsc_toggle_logic()
129 if ((sc->flags & VOTABLE) && status == GDSC_OFF) { in gdsc_toggle_logic()
139 if (sc->gds_hw_ctrl) { in gdsc_toggle_logic()
153 ret = gdsc_poll_status(sc, status); in gdsc_toggle_logic()
154 WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n"); in gdsc_toggle_logic()
156 if (!ret && status == GDSC_OFF && sc->rsupply) { in gdsc_toggle_logic()
157 ret = regulator_disable(sc->rsupply); in gdsc_toggle_logic()
165 static inline int gdsc_deassert_reset(struct gdsc *sc) in gdsc_deassert_reset() argument
169 for (i = 0; i < sc->reset_count; i++) in gdsc_deassert_reset()
170 sc->rcdev->ops->deassert(sc->rcdev, sc->resets[i]); in gdsc_deassert_reset()
174 static inline int gdsc_assert_reset(struct gdsc *sc) in gdsc_assert_reset() argument
178 for (i = 0; i < sc->reset_count; i++) in gdsc_assert_reset()
179 sc->rcdev->ops->assert(sc->rcdev, sc->resets[i]); in gdsc_assert_reset()
183 static inline void gdsc_force_mem_on(struct gdsc *sc) in gdsc_force_mem_on() argument
188 for (i = 0; i < sc->cxc_count; i++) in gdsc_force_mem_on()
189 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, mask); in gdsc_force_mem_on()
192 static inline void gdsc_clear_mem_on(struct gdsc *sc) in gdsc_clear_mem_on() argument
197 for (i = 0; i < sc->cxc_count; i++) in gdsc_clear_mem_on()
198 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, 0); in gdsc_clear_mem_on()
201 static inline void gdsc_deassert_clamp_io(struct gdsc *sc) in gdsc_deassert_clamp_io() argument
203 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_deassert_clamp_io()
207 static inline void gdsc_assert_clamp_io(struct gdsc *sc) in gdsc_assert_clamp_io() argument
209 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_assert_clamp_io()
213 static inline void gdsc_assert_reset_aon(struct gdsc *sc) in gdsc_assert_reset_aon() argument
215 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_assert_reset_aon()
218 regmap_update_bits(sc->regmap, sc->clamp_io_ctrl, in gdsc_assert_reset_aon()
222 static void gdsc_retain_ff_on(struct gdsc *sc) in gdsc_retain_ff_on() argument
226 regmap_update_bits(sc->regmap, sc->gdscr, mask, mask); in gdsc_retain_ff_on()
231 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_enable() local
234 if (sc->pwrsts == PWRSTS_ON) in gdsc_enable()
235 return gdsc_deassert_reset(sc); in gdsc_enable()
237 if (sc->flags & SW_RESET) { in gdsc_enable()
238 gdsc_assert_reset(sc); in gdsc_enable()
240 gdsc_deassert_reset(sc); in gdsc_enable()
243 if (sc->flags & CLAMP_IO) { in gdsc_enable()
244 if (sc->flags & AON_RESET) in gdsc_enable()
245 gdsc_assert_reset_aon(sc); in gdsc_enable()
246 gdsc_deassert_clamp_io(sc); in gdsc_enable()
249 ret = gdsc_toggle_logic(sc, GDSC_ON); in gdsc_enable()
253 if (sc->pwrsts & PWRSTS_OFF) in gdsc_enable()
254 gdsc_force_mem_on(sc); in gdsc_enable()
266 if (sc->flags & HW_CTRL) { in gdsc_enable()
267 ret = gdsc_hwctrl(sc, true); in gdsc_enable()
281 if (sc->flags & RETAIN_FF_ENABLE) in gdsc_enable()
282 gdsc_retain_ff_on(sc); in gdsc_enable()
289 struct gdsc *sc = domain_to_gdsc(domain); in gdsc_disable() local
292 if (sc->pwrsts == PWRSTS_ON) in gdsc_disable()
293 return gdsc_assert_reset(sc); in gdsc_disable()
296 if (sc->flags & HW_CTRL) { in gdsc_disable()
297 ret = gdsc_hwctrl(sc, false); in gdsc_disable()
308 ret = gdsc_poll_status(sc, GDSC_ON); in gdsc_disable()
313 if (sc->pwrsts & PWRSTS_OFF) in gdsc_disable()
314 gdsc_clear_mem_on(sc); in gdsc_disable()
316 ret = gdsc_toggle_logic(sc, GDSC_OFF); in gdsc_disable()
320 if (sc->flags & CLAMP_IO) in gdsc_disable()
321 gdsc_assert_clamp_io(sc); in gdsc_disable()
326 static int gdsc_init(struct gdsc *sc) in gdsc_init() argument
339 ret = regmap_update_bits(sc->regmap, sc->gdscr, mask, val); in gdsc_init()
344 if (sc->pwrsts == PWRSTS_ON) { in gdsc_init()
345 ret = gdsc_toggle_logic(sc, GDSC_ON); in gdsc_init()
350 on = gdsc_check_status(sc, GDSC_ON); in gdsc_init()
358 if ((sc->flags & VOTABLE) && on) in gdsc_init()
359 gdsc_enable(&sc->pd); in gdsc_init()
366 if ((sc->flags & RETAIN_FF_ENABLE) && on) in gdsc_init()
367 gdsc_retain_ff_on(sc); in gdsc_init()
370 if (sc->flags & ALWAYS_ON) { in gdsc_init()
372 gdsc_enable(&sc->pd); in gdsc_init()
374 sc->pd.flags |= GENPD_FLAG_ALWAYS_ON; in gdsc_init()
377 if (on || (sc->pwrsts & PWRSTS_RET)) in gdsc_init()
378 gdsc_force_mem_on(sc); in gdsc_init()
380 gdsc_clear_mem_on(sc); in gdsc_init()
382 if (!sc->pd.power_off) in gdsc_init()
383 sc->pd.power_off = gdsc_disable; in gdsc_init()
384 if (!sc->pd.power_on) in gdsc_init()
385 sc->pd.power_on = gdsc_enable; in gdsc_init()
386 pm_genpd_init(&sc->pd, NULL, !on); in gdsc_init()