60 	 * Source ssp clock from ref_io than ref_xtal,  in clk_misc_init()
61 	 * as ref_xtal only provides 24 MHz as maximum.  in clk_misc_init()
73 static const char *const sel_pll[]  __initconst = { "pll", "ref_xtal", };
74 static const char *const sel_cpu[]  __initconst = { "ref_cpu", "ref_xtal", };
75 static const char *const sel_pix[]  __initconst = { "ref_pix", "ref_xtal", };
76 static const char *const sel_io[]   __initconst = { "ref_io", "ref_xtal", };
81 	ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel,  enumerator
112 	clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);  in mx23_clocks_init()
113 	clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000);  in mx23_clocks_init()
126 	clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);  in mx23_clocks_init()
128 	clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31);  in mx23_clocks_init()
133 	clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29);  in mx23_clocks_init()
136 	clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750);  in mx23_clocks_init()
137 	clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768);  in mx23_clocks_init()
141 	clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28);  in mx23_clocks_init()
142 	clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29);  in mx23_clocks_init()
143 	clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30);  in mx23_clocks_init()
144 	clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31);  in mx23_clocks_init()