352 static void armada_3700_pm_dvfs_update_regs(unsigned int load_level,  in armada_3700_pm_dvfs_update_regs()  argument
356 	if (load_level <= ARMADA_37XX_DVFS_LOAD_1)  in armada_3700_pm_dvfs_update_regs()
361 	if (load_level == ARMADA_37XX_DVFS_LOAD_0 ||  in armada_3700_pm_dvfs_update_regs()
362 	    load_level ==  ARMADA_37XX_DVFS_LOAD_2)  in armada_3700_pm_dvfs_update_regs()
382 	unsigned int load_level, div;  in armada_3700_pm_dvfs_get_cpu_div()  local
389 	regmap_read(base, reg, &load_level);  in armada_3700_pm_dvfs_get_cpu_div()
395 	load_level &= ARMADA_37XX_NB_CPU_LOAD_MASK;  in armada_3700_pm_dvfs_get_cpu_div()
396 	armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in armada_3700_pm_dvfs_get_cpu_div()
407 	unsigned int load_level, sel;  in armada_3700_pm_dvfs_get_cpu_parent()  local
414 	regmap_read(base, reg, &load_level);  in armada_3700_pm_dvfs_get_cpu_parent()
420 	load_level &= ARMADA_37XX_NB_CPU_LOAD_MASK;  in armada_3700_pm_dvfs_get_cpu_parent()
421 	armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in armada_3700_pm_dvfs_get_cpu_parent()
447 	int load_level;  in clk_pm_cpu_set_parent()  local
457 	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {  in clk_pm_cpu_set_parent()
461 		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in clk_pm_cpu_set_parent()
489 	unsigned int load_level;  in clk_pm_cpu_round_rate()  local
494 	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {  in clk_pm_cpu_round_rate()
497 		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in clk_pm_cpu_round_rate()
556 	unsigned int load_level;  in clk_pm_cpu_set_rate()  local
562 	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {  in clk_pm_cpu_set_rate()
566 		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in clk_pm_cpu_set_rate()
583 			regmap_update_bits(base, reg, mask, load_level);  in clk_pm_cpu_set_rate()