1 // SPDX-License-Identifier: GPL-2.0
8 #include "clk-regmap.h"
12 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_gate_endisable()  local
13 	struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);  in clk_regmap_gate_endisable()
14 	int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;  in clk_regmap_gate_endisable()
18 	return regmap_update_bits(clk->map, gate->offset, BIT(gate->bit_idx),  in clk_regmap_gate_endisable()
19 				  set ? BIT(gate->bit_idx) : 0);  in clk_regmap_gate_endisable()
34 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_gate_is_enabled()  local
35 	struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);  in clk_regmap_gate_is_enabled()
38 	regmap_read(clk->map, gate->offset, &val);  in clk_regmap_gate_is_enabled()
39 	if (gate->flags & CLK_GATE_SET_TO_DISABLE)  in clk_regmap_gate_is_enabled()
40 		val ^= BIT(gate->bit_idx);  in clk_regmap_gate_is_enabled()
42 	val &= BIT(gate->bit_idx);  in clk_regmap_gate_is_enabled()
62 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_div_recalc_rate()  local
63 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_recalc_rate()  local
67 	ret = regmap_read(clk->map, div->offset, &val);  in clk_regmap_div_recalc_rate()
72 	val >>= div->shift;  in clk_regmap_div_recalc_rate()
73 	val &= clk_div_mask(div->width);  in clk_regmap_div_recalc_rate()
74 	return divider_recalc_rate(hw, prate, val, div->table, div->flags,  in clk_regmap_div_recalc_rate()
75 				   div->width);  in clk_regmap_div_recalc_rate()
81 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_div_round_rate()  local
82 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_round_rate()  local
87 	if (div->flags & CLK_DIVIDER_READ_ONLY) {  in clk_regmap_div_round_rate()
88 		ret = regmap_read(clk->map, div->offset, &val);  in clk_regmap_div_round_rate()
93 		val >>= div->shift;  in clk_regmap_div_round_rate()
94 		val &= clk_div_mask(div->width);  in clk_regmap_div_round_rate()
96 		return divider_ro_round_rate(hw, rate, prate, div->table,  in clk_regmap_div_round_rate()
97 					     div->width, div->flags, val);  in clk_regmap_div_round_rate()
100 	return divider_round_rate(hw, rate, prate, div->table, div->width,  in clk_regmap_div_round_rate()
101 				  div->flags);  in clk_regmap_div_round_rate()
107 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_div_set_rate()  local
108 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_set_rate()  local
112 	ret = divider_get_val(rate, parent_rate, div->table, div->width,  in clk_regmap_div_set_rate()
113 			      div->flags);  in clk_regmap_div_set_rate()
117 	val = (unsigned int)ret << div->shift;  in clk_regmap_div_set_rate()
118 	return regmap_update_bits(clk->map, div->offset,  in clk_regmap_div_set_rate()
119 				  clk_div_mask(div->width) << div->shift, val);  in clk_regmap_div_set_rate()
139 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_mux_get_parent()  local
140 	struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);  in clk_regmap_mux_get_parent()
144 	ret = regmap_read(clk->map, mux->offset, &val);  in clk_regmap_mux_get_parent()
148 	val >>= mux->shift;  in clk_regmap_mux_get_parent()
149 	val &= mux->mask;  in clk_regmap_mux_get_parent()
150 	return clk_mux_val_to_index(hw, mux->table, mux->flags, val);  in clk_regmap_mux_get_parent()
155 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_mux_set_parent()  local
156 	struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);  in clk_regmap_mux_set_parent()
157 	unsigned int val = clk_mux_index_to_val(mux->table, mux->flags, index);  in clk_regmap_mux_set_parent()
159 	return regmap_update_bits(clk->map, mux->offset,  in clk_regmap_mux_set_parent()
160 				  mux->mask << mux->shift,  in clk_regmap_mux_set_parent()
161 				  val << mux->shift);  in clk_regmap_mux_set_parent()
167 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_mux_determine_rate()  local
168 	struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);  in clk_regmap_mux_determine_rate()
170 	return clk_mux_determine_rate_flags(hw, req, mux->flags);  in clk_regmap_mux_determine_rate()