Lines Matching full:uart_sel
756 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel",
1099 "uart_sel", 20),
1101 "uart_sel", 21),
1103 "uart_sel", 22),
1105 "uart_sel", 23),
1132 "uart_sel", 9),
1134 "uart_sel", 11),
1136 "uart_sel", 12),
1138 "uart_sel", 14),
1140 "uart_sel", 15),
1142 "uart_sel", 16),