Lines Matching full:divider

27  * @n_shift: the number of bits to shift the divider value by (ie. the
28  *           index of the lowest bit of the divider value in the PLL's
30  * @n_bits: the size of the divider field in bits
31  * @n_offset: the divider value which encodes to 0 in the PLL's control
33  * @od_shift: the number of bits to shift the post-VCO divider value by (ie.
34  *            the index of the lowest bit of the post-VCO divider value in
36  * @od_bits: the size of the post-VCO divider field in bits
37  * @od_max: the maximum post-VCO divider value
38  * @od_encoding: a pointer to an array mapping post-VCO divider values to
75  * struct ingenic_cgu_div_info - information about a divider
76  * @reg: offset of the divider control register within the CGU
79  * @div: number to divide the divider value by (i.e. if the
80  *	 effective divider value is the value written to the register
88  *             actual divider value
102  * struct ingenic_cgu_fixdiv_info - information about a fixed divider
103  * @div: the divider applied to the parent clock