Lines Matching +full:0 +full:x30000

11 #define LSIO_PWM_0_LPCG			0x00000
12 #define LSIO_PWM_1_LPCG			0x10000
13 #define LSIO_PWM_2_LPCG			0x20000
14 #define LSIO_PWM_3_LPCG			0x30000
15 #define LSIO_PWM_4_LPCG			0x40000
16 #define LSIO_PWM_5_LPCG			0x50000
17 #define LSIO_PWM_6_LPCG			0x60000
18 #define LSIO_PWM_7_LPCG			0x70000
19 #define LSIO_GPIO_0_LPCG		0x80000
20 #define LSIO_GPIO_1_LPCG		0x90000
21 #define LSIO_GPIO_2_LPCG		0xa0000
22 #define LSIO_GPIO_3_LPCG		0xb0000
23 #define LSIO_GPIO_4_LPCG		0xc0000
24 #define LSIO_GPIO_5_LPCG		0xd0000
25 #define LSIO_GPIO_6_LPCG		0xe0000
26 #define LSIO_GPIO_7_LPCG		0xf0000
27 #define LSIO_FSPI_0_LPCG		0x120000
28 #define LSIO_FSPI_1_LPCG		0x130000
29 #define LSIO_GPT_0_LPCG			0x140000
30 #define LSIO_GPT_1_LPCG			0x150000
31 #define LSIO_GPT_2_LPCG			0x160000
32 #define LSIO_GPT_3_LPCG			0x170000
33 #define LSIO_GPT_4_LPCG			0x180000
34 #define LSIO_OCRAM_LPCG			0x190000
35 #define LSIO_KPP_LPCG			0x1a0000
36 #define LSIO_ROMCP_LPCG			0x100000
39 #define CONN_USDHC_0_LPCG		0x00000
40 #define CONN_USDHC_1_LPCG		0x10000
41 #define CONN_USDHC_2_LPCG		0x20000
42 #define CONN_ENET_0_LPCG		0x30000
43 #define CONN_ENET_1_LPCG		0x40000
44 #define CONN_DTCP_LPCG			0x50000
45 #define CONN_MLB_LPCG			0x60000
46 #define CONN_USB_2_LPCG			0x70000
47 #define CONN_USB_3_LPCG			0x80000
48 #define CONN_NAND_LPCG			0x90000
49 #define CONN_EDMA_LPCG			0xa0000
52 #define ADMA_ASRC_0_LPCG		0x400000
53 #define ADMA_ESAI_0_LPCG		0x410000
54 #define ADMA_SPDIF_0_LPCG		0x420000
55 #define ADMA_SAI_0_LPCG			0x440000
56 #define ADMA_SAI_1_LPCG			0x450000
57 #define ADMA_SAI_2_LPCG			0x460000
58 #define ADMA_SAI_3_LPCG			0x470000
59 #define ADMA_GPT_5_LPCG			0x4b0000
60 #define ADMA_GPT_6_LPCG			0x4c0000
61 #define ADMA_GPT_7_LPCG			0x4d0000
62 #define ADMA_GPT_8_LPCG			0x4e0000
63 #define ADMA_GPT_9_LPCG			0x4f0000
64 #define ADMA_GPT_10_LPCG		0x500000
65 #define ADMA_HIFI_LPCG			0x580000
66 #define ADMA_OCRAM_LPCG			0x590000
67 #define ADMA_EDMA_0_LPCG		0x5f0000
68 #define ADMA_ASRC_1_LPCG		0xc00000
69 #define ADMA_SAI_4_LPCG			0xc20000
70 #define ADMA_SAI_5_LPCG			0xc30000
71 #define ADMA_AMIX_LPCG			0xc40000
72 #define ADMA_MQS_LPCG			0xc50000
73 #define ADMA_ACM_LPCG			0xc60000
74 #define ADMA_REC_CLK0_LPCG		0xd00000
75 #define ADMA_REC_CLK1_LPCG		0xd10000
76 #define ADMA_PLL_CLK0_LPCG		0xd20000
77 #define ADMA_PLL_CLK1_LPCG		0xd30000
78 #define ADMA_MCLKOUT0_LPCG		0xd50000
79 #define ADMA_MCLKOUT1_LPCG		0xd60000
80 #define ADMA_EDMA_1_LPCG		0xdf0000
81 #define ADMA_LPSPI_0_LPCG		0x1400000
82 #define ADMA_LPSPI_1_LPCG		0x1410000
83 #define ADMA_LPSPI_2_LPCG		0x1420000
84 #define ADMA_LPSPI_3_LPCG		0x1430000
85 #define ADMA_LPUART_0_LPCG		0x1460000
86 #define ADMA_LPUART_1_LPCG		0x1470000
87 #define ADMA_LPUART_2_LPCG		0x1480000
88 #define ADMA_LPUART_3_LPCG		0x1490000
89 #define ADMA_LCD_LPCG			0x1580000
90 #define ADMA_PWM_LPCG			0x1590000
91 #define ADMA_LPI2C_0_LPCG		0x1c00000
92 #define ADMA_LPI2C_1_LPCG		0x1c10000
93 #define ADMA_LPI2C_2_LPCG		0x1c20000
94 #define ADMA_LPI2C_3_LPCG		0x1c30000
95 #define ADMA_ADC_0_LPCG			0x1c80000
96 #define ADMA_FTM_0_LPCG			0x1ca0000
97 #define ADMA_FTM_1_LPCG			0x1cb0000
98 #define ADMA_FLEXCAN_0_LPCG		0x1cd0000
99 #define ADMA_FLEXCAN_1_LPCG		0x1ce0000
100 #define ADMA_FLEXCAN_2_LPCG		0x1cf0000