1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
17 #include "clk.h"
19 #define div_mask(width)	((1 << (width)) - 1)
22  * struct hi6220_clk_divider - divider clock for hi6220
24  * @hw:		handle between common and hardware-specific interfaces
29  * @table:	the div table that the divider supports
51 	val = readl_relaxed(dclk->reg) >> dclk->shift;  in hi6220_clkdiv_recalc_rate()
52 	val &= div_mask(dclk->width);  in hi6220_clkdiv_recalc_rate()
54 	return divider_recalc_rate(hw, parent_rate, val, dclk->table,  in hi6220_clkdiv_recalc_rate()
55 				   CLK_DIVIDER_ROUND_CLOSEST, dclk->width);  in hi6220_clkdiv_recalc_rate()
63 	return divider_round_rate(hw, rate, prate, dclk->table,  in hi6220_clkdiv_round_rate()
64 				  dclk->width, CLK_DIVIDER_ROUND_CLOSEST);  in hi6220_clkdiv_round_rate()
75 	value = divider_get_val(rate, parent_rate, dclk->table,  in hi6220_clkdiv_set_rate()
76 				dclk->width, CLK_DIVIDER_ROUND_CLOSEST);  in hi6220_clkdiv_set_rate()
78 	if (dclk->lock)  in hi6220_clkdiv_set_rate()
79 		spin_lock_irqsave(dclk->lock, flags);  in hi6220_clkdiv_set_rate()
81 	data = readl_relaxed(dclk->reg);  in hi6220_clkdiv_set_rate()
82 	data &= ~(div_mask(dclk->width) << dclk->shift);  in hi6220_clkdiv_set_rate()
83 	data |= value << dclk->shift;  in hi6220_clkdiv_set_rate()
84 	data |= dclk->mask;  in hi6220_clkdiv_set_rate()
86 	writel_relaxed(data, dclk->reg);  in hi6220_clkdiv_set_rate()
88 	if (dclk->lock)  in hi6220_clkdiv_set_rate()
89 		spin_unlock_irqrestore(dclk->lock, flags);  in hi6220_clkdiv_set_rate()
100 struct clk *hi6220_register_clkdiv(struct device *dev, const char *name,  in hi6220_register_clkdiv()
104 	struct hi6220_clk_divider *div;  in hi6220_register_clkdiv()  local
105 	struct clk *clk;  in hi6220_register_clkdiv()  local
112 	div = kzalloc(sizeof(*div), GFP_KERNEL);  in hi6220_register_clkdiv()
113 	if (!div)  in hi6220_register_clkdiv()
114 		return ERR_PTR(-ENOMEM);  in hi6220_register_clkdiv()
122 		kfree(div);  in hi6220_register_clkdiv()
123 		return ERR_PTR(-ENOMEM);  in hi6220_register_clkdiv()
127 		table[i].div = min_div + i;  in hi6220_register_clkdiv()
128 		table[i].val = table[i].div - 1;  in hi6220_register_clkdiv()
138 	div->reg = reg;  in hi6220_register_clkdiv()
139 	div->shift = shift;  in hi6220_register_clkdiv()
140 	div->width = width;  in hi6220_register_clkdiv()
141 	div->mask = mask_bit ? BIT(mask_bit) : 0;  in hi6220_register_clkdiv()
142 	div->lock = lock;  in hi6220_register_clkdiv()
143 	div->hw.init = &init;  in hi6220_register_clkdiv()
144 	div->table = table;  in hi6220_register_clkdiv()
147 	clk = clk_register(dev, &div->hw);  in hi6220_register_clkdiv()
148 	if (IS_ERR(clk)) {  in hi6220_register_clkdiv()
150 		kfree(div);  in hi6220_register_clkdiv()
153 	return clk;  in hi6220_register_clkdiv()