Lines Matching +full:omap +full:- +full:l138
1 // SPDX-License-Identifier: GPL-2.0
3 * PLL clock descriptions for TI DA850/OMAP-L138/AM18XX
9 #include <linux/clk-provider.h>
16 #include <linux/mfd/da8xx-cfgchip.h>
96 clk_register_clkdev(clk, "pll0_sysclk1", "da850-psc0"); in da850_pll0_init()
99 clk_register_clkdev(clk, "pll0_sysclk2", "da850-psc0"); in da850_pll0_init()
100 clk_register_clkdev(clk, "pll0_sysclk2", "da850-psc1"); in da850_pll0_init()
101 clk_register_clkdev(clk, "pll0_sysclk2", "da850-async3-clksrc"); in da850_pll0_init()
104 clk_register_clkdev(clk, "pll0_sysclk3", "da850-async1-clksrc"); in da850_pll0_init()
107 clk_register_clkdev(clk, "pll0_sysclk4", "da850-psc0"); in da850_pll0_init()
108 clk_register_clkdev(clk, "pll0_sysclk4", "da850-psc1"); in da850_pll0_init()
113 clk_register_clkdev(clk, "pll0_sysclk6", "da850-psc0"); in da850_pll0_init()
124 clk_register_clkdev(clk, NULL, "davinci-wdt"); in da850_pll0_init()
153 cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); in of_da850_pll0_init()
207 clk_register_clkdev(clk, "pll1_sysclk2", "da850-async3-clksrc"); in da850_pll1_init()
225 return of_davinci_pll_init(dev, dev->of_node, &da850_pll1_info, in of_da850_pll1_init()