Lines Matching +full:5 +full:p49v5923
3 * Driver for IDT Versaclock 5
94 #define VC5_CLK_OUTPUT_CFG0_CFG_SHIFT 5
122 #define VC5_GLOBAL_REGISTER_GLOBAL_RESET BIT(5)
133 #define VC5_MAX_CLK_OUT_NUM 5
416 u8 fb[5]; in vc5_pll_recalc_rate()
418 regmap_bulk_read(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5); in vc5_pll_recalc_rate()
460 u8 fb[5]; in vc5_pll_set_rate()
468 return regmap_bulk_write(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5); in vc5_pll_set_rate()
1076 .clk_out_cnt = 5,
1090 .clk_out_cnt = 5,
1097 .clk_out_cnt = 5,
1104 .clk_out_cnt = 5,
1109 { "5p49v5923", .driver_data = IDT_VC5_5P49V5923 },
1110 { "5p49v5925", .driver_data = IDT_VC5_5P49V5925 },
1111 { "5p49v5933", .driver_data = IDT_VC5_5P49V5933 },
1112 { "5p49v5935", .driver_data = IDT_VC5_5P49V5935 },
1113 { "5p49v6901", .driver_data = IDT_VC6_5P49V6901 },
1114 { "5p49v6965", .driver_data = IDT_VC6_5P49V6965 },
1120 { .compatible = "idt,5p49v5923", .data = &idt_5p49v5923_info },
1121 { .compatible = "idt,5p49v5925", .data = &idt_5p49v5925_info },
1122 { .compatible = "idt,5p49v5933", .data = &idt_5p49v5933_info },
1123 { .compatible = "idt,5p49v5935", .data = &idt_5p49v5935_info },
1124 { .compatible = "idt,5p49v6901", .data = &idt_5p49v6901_info },
1125 { .compatible = "idt,5p49v6965", .data = &idt_5p49v6965_info },
1145 MODULE_DESCRIPTION("IDT VersaClock 5 driver");