1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
16  * prepare - clk_prepare only ensures that parents are prepared
17  * enable - clk_enable only ensures that parents are enabled
18  * rate - rate is fixed.  clk->rate = parent->rate / div * mult
19  * parent - fixed parent.  No clk_set_parent support
28 	rate = (unsigned long long int)parent_rate * fix->mult;  in clk_factor_recalc_rate()
29 	do_div(rate, fix->div);  in clk_factor_recalc_rate()
41 		best_parent = (rate / fix->mult) * fix->div;  in clk_factor_round_rate()
45 	return (*prate / fix->div) * fix->mult;  in clk_factor_round_rate()
70 		unsigned long flags, unsigned int mult, unsigned int div)  in __clk_hw_register_fixed_factor()  argument
80 		return ERR_PTR(-ENOMEM);  in __clk_hw_register_fixed_factor()
83 	fix->mult = mult;  in __clk_hw_register_fixed_factor()
84 	fix->div = div;  in __clk_hw_register_fixed_factor()
85 	fix->hw.init = &init;  in __clk_hw_register_fixed_factor()
96 	hw = &fix->hw;  in __clk_hw_register_fixed_factor()
111 		unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor()  argument
113 	return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,  in clk_hw_register_fixed_factor()
114 					      flags, mult, div);  in clk_hw_register_fixed_factor()
118 struct clk *clk_register_fixed_factor(struct device *dev, const char *name,  in clk_register_fixed_factor()
120 		unsigned int mult, unsigned int div)  in clk_register_fixed_factor()  argument
125 					  div);  in clk_register_fixed_factor()
128 	return hw->clk;  in clk_register_fixed_factor()
132 void clk_unregister_fixed_factor(struct clk *clk)  in clk_unregister_fixed_factor()  argument
136 	hw = __clk_get_hw(clk);  in clk_unregister_fixed_factor()
140 	clk_unregister(clk);  in clk_unregister_fixed_factor()
158 	{ .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
165 	const char *clk_name = node->name;  in _of_fixed_factor_clk_setup()
167 	u32 div, mult;  in _of_fixed_factor_clk_setup()  local
170 	if (of_property_read_u32(node, "clock-div", &div)) {  in _of_fixed_factor_clk_setup()
171 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",  in _of_fixed_factor_clk_setup()
173 		return ERR_PTR(-EIO);  in _of_fixed_factor_clk_setup()
176 	if (of_property_read_u32(node, "clock-mult", &mult)) {  in _of_fixed_factor_clk_setup()
177 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",  in _of_fixed_factor_clk_setup()
179 		return ERR_PTR(-EIO);  in _of_fixed_factor_clk_setup()
182 	of_property_read_string(node, "clock-output-names", &clk_name);  in _of_fixed_factor_clk_setup()
188 					    flags, mult, div);  in _of_fixed_factor_clk_setup()
208  * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
215 CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
220 	struct clk_hw *clk = platform_get_drvdata(pdev);  in of_fixed_factor_clk_remove()  local
222 	of_clk_del_provider(pdev->dev.of_node);  in of_fixed_factor_clk_remove()
223 	clk_hw_unregister_fixed_factor(clk);  in of_fixed_factor_clk_remove()
230 	struct clk_hw *clk;  in of_fixed_factor_clk_probe()  local
236 	clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);  in of_fixed_factor_clk_probe()
237 	if (IS_ERR(clk))  in of_fixed_factor_clk_probe()
238 		return PTR_ERR(clk);  in of_fixed_factor_clk_probe()
240 	platform_set_drvdata(pdev, clk);  in of_fixed_factor_clk_probe()
246 	{ .compatible = "fixed-factor-clock" },