600 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_div_recalc_rate()  local
601 	struct bm1880_div_clock *div = &div_hw->div;  in bm1880_clk_div_recalc_rate()
602 	void __iomem *reg_addr = div_hw->base + div->reg;  in bm1880_clk_div_recalc_rate()
622 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_div_round_rate()  local
623 	struct bm1880_div_clock *div = &div_hw->div;  in bm1880_clk_div_round_rate()
624 	void __iomem *reg_addr = div_hw->base + div->reg;  in bm1880_clk_div_round_rate()
644 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_div_set_rate()  local
645 	struct bm1880_div_clock *div = &div_hw->div;  in bm1880_clk_div_set_rate()
646 	void __iomem *reg_addr = div_hw->base + div->reg;  in bm1880_clk_div_set_rate()
652 				div->width, div_hw->div.flags);  in bm1880_clk_div_set_rate()
656 	if (div_hw->lock)  in bm1880_clk_div_set_rate()
657 		spin_lock_irqsave(div_hw->lock, flags);  in bm1880_clk_div_set_rate()
659 		__acquire(div_hw->lock);  in bm1880_clk_div_set_rate()
662 	val &= ~(clk_div_mask(div->width) << div_hw->div.shift);  in bm1880_clk_div_set_rate()
666 	if (div_hw->lock)  in bm1880_clk_div_set_rate()
667 		spin_unlock_irqrestore(div_hw->lock, flags);  in bm1880_clk_div_set_rate()
669 		__release(div_hw->lock);  in bm1880_clk_div_set_rate()
700 	struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);  in bm1880_clk_unregister_div()  local
703 	kfree(div_hw);  in bm1880_clk_unregister_div()
777 	struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;  in bm1880_clk_register_composite()  local
836 		div_hw = &div_hws->hw;  in bm1880_clk_register_composite()
841 				       num_parents, mux_hw, mux_ops, div_hw,  in bm1880_clk_register_composite()