Lines Matching full:divider

228  * output rate of the clock.  Each divider can be either fixed or
229  * variable.  If there are two dividers, they are the "pre-divider"
230  * and the "regular" or "downstream" divider.  If there is only one,
231  * there is no pre-divider.
233  * A fixed divider is any non-zero (positive) value, and it
234  * indicates how the input rate is affected by the divider.
236  * The value of a variable divider is maintained in a sub-field of a
237  * 32-bit divider register.  The position of the field in the
241  * In addition, a variable divider can indicate that some subset
242  * of its bits represent a "fractional" part of the divider.  Such
243  * bits comprise the low-order portion of the divider field, and can
244  * be viewed as representing the portion of the divider that lies to
250  * code a divider field value is distinguished from the value it
253  * In order to avoid dealing with fractions, divider arithmetic is
255  * been left-shifted by the fractional width of a divider.  Dividing
260  * The recorded value of a variable divider can be modified.  To
261  * modify either divider (or both), a clock must be enabled (i.e.,
268 		struct {	/* variable divider */
269 			u32 offset;	/* divider register offset */
274 			u64 scaled_div;	/* scaled divider value */
276 		u32 fixed;	/* non-zero fixed divider value */
282  * Divider flags:
283  *   EXISTS means this divider exists
284  *   FIXED means it is a fixed-rate divider
286 #define BCM_CLK_DIV_FLAGS_EXISTS	((u32)1 << 0)	/* Divider is valid */
289 /* Divider initialization macros */
291 /* A fixed (non-zero) divider */
298 /* A divider with an integral divisor */
299 #define DIVIDER(_offset, _shift, _width)				\  macro
308 /* A divider whose divisor has an integer and fractional part */
359  * Making changes to a variable divider or a selector for a clock
368  * selector and/or its pre-divider.