Lines Matching full:divider

78 				     unsigned long divider)  in ccu_div_var_update_clkdiv()  argument
85 nd = ccu_div_lock_delay_ns(parent_rate, divider); in ccu_div_var_update_clkdiv()
135 pr_err("Divider '%s' lock timed out\n", clk_hw_get_name(hw)); in ccu_div_var_enable()
177 unsigned long divider; in ccu_div_var_recalc_rate() local
181 divider = ccu_div_get(div->mask, val); in ccu_div_var_recalc_rate()
183 return ccu_div_calc_freq(parent_rate, divider); in ccu_div_var_recalc_rate()
190 unsigned long divider; in ccu_div_var_calc_divider() local
192 divider = parent_rate / rate; in ccu_div_var_calc_divider()
193 return clamp_t(unsigned long, divider, CCU_DIV_CLKDIV_MIN, in ccu_div_var_calc_divider()
201 unsigned long divider; in ccu_div_var_round_rate() local
203 divider = ccu_div_var_calc_divider(rate, *parent_rate, div->mask); in ccu_div_var_round_rate()
205 return ccu_div_calc_freq(*parent_rate, divider); in ccu_div_var_round_rate()
209 * This method is used for the clock divider blocks, which support the
217 unsigned long flags, divider; in ccu_div_var_set_rate_slow() local
221 divider = ccu_div_var_calc_divider(rate, parent_rate, div->mask); in ccu_div_var_set_rate_slow()
222 if (divider == 1 && div->features & CCU_DIV_SKIP_ONE) { in ccu_div_var_set_rate_slow()
223 divider = 0; in ccu_div_var_set_rate_slow()
225 if (divider == 1 || divider == 2) in ccu_div_var_set_rate_slow()
226 divider = 0; in ccu_div_var_set_rate_slow()
227 else if (divider == 3) in ccu_div_var_set_rate_slow()
228 divider = 4; in ccu_div_var_set_rate_slow()
231 val = ccu_div_prep(div->mask, divider); in ccu_div_var_set_rate_slow()
235 ret = ccu_div_var_update_clkdiv(div, parent_rate, divider); in ccu_div_var_set_rate_slow()
238 pr_err("Divider '%s' lock timed out\n", clk_hw_get_name(hw)); in ccu_div_var_set_rate_slow()
244 * This method is used for the clock divider blocks, which don't support
251 unsigned long flags, divider; in ccu_div_var_set_rate_fast() local
254 divider = ccu_div_var_calc_divider(rate, parent_rate, div->mask); in ccu_div_var_set_rate_fast()
255 val = ccu_div_prep(div->mask, divider); in ccu_div_var_set_rate_fast()
258 * Also disable the clock divider block if it was enabled by default in ccu_div_var_set_rate_fast()
274 return ccu_div_calc_freq(parent_rate, div->divider); in ccu_div_fixed_recalc_rate()
282 return ccu_div_calc_freq(*parent_rate, div->divider); in ccu_div_fixed_round_rate()
332 * It can be dangerous to change the Divider settings behind clock framework
411 *val = div->divider; in ccu_div_dbgfs_fixed_clkdiv_get()
568 div->divider = div_init->divider; in ccu_div_hw_register()
571 div->divider = div_init->divider; in ccu_div_hw_register()