20 #define PLL_MUL(reg, layout)	(((reg) >> (layout)->mul_shift) & \  argument
21 				 (layout)->mul_mask)
23 #define PLL_MUL_MASK(layout)	((layout)->mul_mask)  argument
24 #define PLL_MUL_MAX(layout)	(PLL_MUL_MASK(layout) + 1)  argument
41 	const struct clk_pll_layout *layout;  member
58 	const struct clk_pll_layout *layout = pll->layout;  in clk_pll_prepare()  local
72 	mul = PLL_MUL(pllr, layout);  in clk_pll_prepare()
86 	regmap_update_bits(regmap, offset, layout->pllr_mask,  in clk_pll_prepare()
89 			((pll->mul & layout->mul_mask) << layout->mul_shift));  in clk_pll_prepare()
107 	unsigned int mask = pll->layout->pllr_mask;  in clk_pll_unprepare()
127 	const struct clk_pll_layout *layout = pll->layout;  in clk_pll_get_best_div_mul()  local
162 	 * layout (limited by the MUL or DIV field size).  in clk_pll_get_best_div_mul()
164 	maxdiv = DIV_ROUND_UP(parent_rate * PLL_MUL_MAX(layout), rate);  in clk_pll_get_best_div_mul()
275 		      const struct clk_pll_layout *layout,  in at91_clk_register_pll()  argument
300 	pll->layout = layout;  in at91_clk_register_pll()
305 	pll->mul = PLL_MUL(pllr, layout);  in at91_clk_register_pll()