1 // SPDX-License-Identifier: GPL-2.0-or-later
3  *    ata_piix.c - Intel PATA/SATA controllers
6  *    		    Please ALWAYS copy linux-ide@vger.kernel.org
9  *	Copyright 2003-2005 Red Hat Inc
10  *	Copyright 2003-2005 Jeff Garzik
14  *  Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
15  *  Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
19  *  as Documentation/driver-api/libata.rst
40  *	PIIX4    errata #9	- Only on ultra obscure hw
41  *	ICH3	 errata #13     - Not observed to affect real hw
45  *	PIIX4	errata #10	- BM IDE hang with non UDMA
47  *	440MX   errata #15	- As PIIX4 errata #10
48  *	PIIX4	errata #15	- Must not read control registers
50  *	440MX   errata #13	- As PIIX4 errata #15
51  *	ICH2	errata #21	- DMA mode 0 doesn't work right
52  *	ICH0/1  errata #55	- As ICH2 errata #21
53  *	ICH2	spec c #9	- Extra operations needed to handle
55  *	ICH2    spec c #20	- IDE PRD must not cross a 64K boundary
57  *	ICH2    spec c #24	- UDMA mode 4,5 t85/86 should be 6ns not 3.3
58  *	ICH7	errata #16	- MWDMA1 timings are incorrect
61  *	450NX:	errata #19	- DMA hangs on old 450NX
62  *	450NX:  errata #20	- DMA hangs on old 450NX
63  *	450NX:  errata #25	- Corruption with DMA on old 450NX
64  *	ICH3    errata #15      - IDE deadlock under high load
66  *	ICH3	errata #18	- Don't use native mode
85 	PIIX_IOCFG		= 0x54, /* IDE I/O configuration register */
87 	ICH5_PCS		= 0x92,	/* port control and status */
105 	P0			= 0,  /* port 0 */
106 	P1			= 1,  /* port 1 */
107 	P2			= 2,  /* port 2 */
108 	P3			= 3,  /* port 3 */
109 	IDE			= -1, /* IDE */  enumerator
110 	NA			= -2, /* not available */
111 	RV			= -3, /* reserved */
115 	/* host->flags bits */
132 	ich8m_apple_sata,	/* locks up on second port enable */
180 	/* Intel ICH4-L */
187 	/* C-ICH (i810E2) */
193 	/* ICH7/7-R (i945, i975) UDMA 100*/
213 	/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
214 	 * Attach iff the controller is in IDE mode. */
223 	/* SATA Controller 1 IDE (ICH8) */
225 	/* SATA Controller 2 IDE (ICH8) */
227 	/* Mobile SATA Controller IDE (ICH8M), Apple */
231 	/* Mobile SATA Controller IDE (ICH8M) */
233 	/* SATA Controller IDE (ICH9) */
235 	/* SATA Controller IDE (ICH9) */
237 	/* SATA Controller IDE (ICH9) */
239 	/* SATA Controller IDE (ICH9M) */
241 	/* SATA Controller IDE (ICH9M) */
243 	/* SATA Controller IDE (ICH9M) */
245 	/* SATA Controller IDE (Tolapai) */
247 	/* SATA Controller IDE (ICH10) */
249 	/* SATA Controller IDE (ICH10) */
251 	/* SATA Controller IDE (ICH10) */
253 	/* SATA Controller IDE (ICH10) */
255 	/* SATA Controller IDE (PCH) */
257 	/* SATA Controller IDE (PCH) */
259 	/* SATA Controller IDE (PCH) */
261 	/* SATA Controller IDE (PCH) */
263 	/* SATA Controller IDE (PCH) */
265 	/* SATA Controller IDE (PCH) */
267 	/* SATA Controller IDE (CPT) */
269 	/* SATA Controller IDE (CPT) */
271 	/* SATA Controller IDE (CPT) */
273 	/* SATA Controller IDE (CPT) */
275 	/* SATA Controller IDE (PBG) */
277 	/* SATA Controller IDE (PBG) */
279 	/* SATA Controller IDE (Panther Point) */
281 	/* SATA Controller IDE (Panther Point) */
283 	/* SATA Controller IDE (Panther Point) */
285 	/* SATA Controller IDE (Panther Point) */
287 	/* SATA Controller IDE (Lynx Point) */
289 	/* SATA Controller IDE (Lynx Point) */
291 	/* SATA Controller IDE (Lynx Point) */
293 	/* SATA Controller IDE (Lynx Point) */
295 	/* SATA Controller IDE (Lynx Point-LP) */
297 	/* SATA Controller IDE (Lynx Point-LP) */
299 	/* SATA Controller IDE (Lynx Point-LP) */
301 	/* SATA Controller IDE (Lynx Point-LP) */
303 	/* SATA Controller IDE (DH89xxCC) */
305 	/* SATA Controller IDE (Avoton) */
307 	/* SATA Controller IDE (Avoton) */
309 	/* SATA Controller IDE (Avoton) */
311 	/* SATA Controller IDE (Avoton) */
313 	/* SATA Controller IDE (Wellsburg) */
315 	/* SATA Controller IDE (Wellsburg) */
317 	/* SATA Controller IDE (Wellsburg) */
319 	/* SATA Controller IDE (Wellsburg) */
321 	/* SATA Controller IDE (BayTrail) */
324 	/* SATA Controller IDE (Coleto Creek) */
326 	/* SATA Controller IDE (9 Series) */
328 	/* SATA Controller IDE (9 Series) */
330 	/* SATA Controller IDE (9 Series) */
332 	/* SATA Controller IDE (9 Series) */
347 		{  P0,  P1, IDE, IDE }, /* 100b */
348 		{  P1,  P0, IDE, IDE }, /* 101b */
349 		{ IDE, IDE,  P0,  P1 }, /* 110b */
350 		{ IDE, IDE,  P1,  P0 }, /* 111b */
360 		{ IDE, IDE,  P1,  P3 }, /* 01b */
361 		{  P0,  P2, IDE, IDE }, /* 10b */
377 		{ IDE, IDE,  P1,  P3 }, /* 01b */
378 		{  P0,  P2, IDE, IDE }, /* 10b */
390 		{  P0,  P2, IDE, IDE }, /* 10b (IDE mode) */
414 		{  P0,  P2, IDE, IDE }, /* 10b */
445 	{ 0x41U, 1U, 0x80UL, 0x80UL },	/* port 0 */
446 	{ 0x43U, 1U, 0x80UL, 0x80UL },	/* port 1 */
450 MODULE_DESCRIPTION("SCSI low-level driver for Intel PIIX/ICH ATA controllers");
474 	{ 0x27DF, 0x1071, 0xD221 },	/* ICH7 on Hercules EC-900 */
478 	{ 0x24CA, 0x10CF, 0x11AB },	/* ICH4M on Fujitsu-Siemens Lifebook S6120 */
481 	{ 0x27df, 0x104d, 0x900e },	/* ICH7 on Sony TZ-90 */
488 	if (!(ap->flags & PIIX_FLAG_PIO16))  in piix_port_start()
489 		ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;  in piix_port_start()
495  *	ich_pata_cable_detect - Probe host controller cable detect info
496  *	@ap: Port for which cable detect info is desired
507 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in ich_pata_cable_detect()
508 	struct piix_host_priv *hpriv = ap->host->private_data;  in ich_pata_cable_detect()
513 	while (lap->device) {  in ich_pata_cable_detect()
514 		if (lap->device == pdev->device &&  in ich_pata_cable_detect()
515 		    lap->subvendor == pdev->subsystem_vendor &&  in ich_pata_cable_detect()
516 		    lap->subdevice == pdev->subsystem_device)  in ich_pata_cable_detect()
523 	mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;  in ich_pata_cable_detect()
524 	if ((hpriv->saved_iocfg & mask) == 0)  in ich_pata_cable_detect()
530  *	piix_pata_prereset - prereset for PATA host controller
539 	struct ata_port *ap = link->ap;  in piix_pata_prereset()
540 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in piix_pata_prereset()
542 	if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no]))  in piix_pata_prereset()
543 		return -ENOENT;  in piix_pata_prereset()
552 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);  in piix_set_timings()
554 	unsigned int is_slave	= (adev->devno != 0);  in piix_set_timings()
555 	unsigned int master_port= ap->port_no ? 0x42 : 0x40;  in piix_set_timings()
563 	 *	See Intel Document 298600-004 for the timing programing rules  in piix_set_timings()
579 	if (adev->class == ATA_DEV_ATA)  in piix_set_timings()
585 	if (adev->pio_mode < XFER_PIO_0 + pio)  in piix_set_timings()
602 		slave_data &= (ap->port_no ? 0x0f : 0xf0);  in piix_set_timings()
605 						<< (ap->port_no ? 4 : 0);  in piix_set_timings()
623 	/* Ensure the UDMA bit is off - it will be turned back on if  in piix_set_timings()
626 	if (ap->udma_mask) {  in piix_set_timings()
628 		udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));  in piix_set_timings()
636  *	piix_set_piomode - Initialize host controller PATA PIO timings
637  *	@ap: Port whose timings we are configuring
648 	piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0);  in piix_set_piomode()
652  *	do_pata_set_dmamode - Initialize host controller PATA PIO timings
653  *	@ap: Port whose timings we are configuring
665 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);  in do_pata_set_dmamode()
667 	u8 speed		= adev->dma_mode;  in do_pata_set_dmamode()
668 	int devid		= adev->devno + 2 * ap->port_no;  in do_pata_set_dmamode()
672 		unsigned int udma = speed - XFER_UDMA_0;  in do_pata_set_dmamode()
688 		u_speed = min(2 - (udma & 1), udma);  in do_pata_set_dmamode()
719 		unsigned int mwdma = speed - XFER_MW_DMA_0;  in do_pata_set_dmamode()
723 		int pio = needed_pio[mwdma] - XFER_PIO_0;  in do_pata_set_dmamode()
731  *	piix_set_dmamode - Initialize host controller PATA DMA timings
732  *	@ap: Port whose timings we are configuring
747  *	ich_set_dmamode - Initialize host controller PATA DMA timings
748  *	@ap: Port whose timings we are configuring
778 	struct ata_port *ap = link->ap;  in piix_sidpr_sel()
779 	struct piix_host_priv *hpriv = ap->host->private_data;  in piix_sidpr_sel()
781 	iowrite32(((ap->port_no * 2 + link->pmp) << 8) | piix_sidx_map[reg],  in piix_sidpr_sel()
782 		  hpriv->sidpr + PIIX_SIDPR_IDX);  in piix_sidpr_sel()
788 	struct piix_host_priv *hpriv = link->ap->host->private_data;  in piix_sidpr_scr_read()
791 		return -EINVAL;  in piix_sidpr_scr_read()
794 	*val = ioread32(hpriv->sidpr + PIIX_SIDPR_DATA);  in piix_sidpr_scr_read()
801 	struct piix_host_priv *hpriv = link->ap->host->private_data;  in piix_sidpr_scr_write()
804 		return -EINVAL;  in piix_sidpr_scr_write()
807 	iowrite32(val, hpriv->sidpr + PIIX_SIDPR_DATA);  in piix_sidpr_scr_write()
819 	if (unlikely(!ap->ioaddr.bmdma_addr))  in piix_irq_check()
822 	return ap->ops->bmdma_status(ap) & ATA_DMA_INTR;  in piix_irq_check()
955 			.ident = "VGN-BX297XP",  in piix_broken_suspend()
958 				DMI_MATCH(DMI_PRODUCT_NAME, "VGN-BX297XP"),  in piix_broken_suspend()
1008 		if (pdev->current_state == PCI_D0)  in piix_pci_device_suspend()
1009 			pdev->current_state = PCI_UNKNOWN;  in piix_pci_device_suspend()
1012 		spin_lock_irqsave(&host->lock, flags);  in piix_pci_device_suspend()
1013 		host->flags |= PIIX_HOST_BROKEN_SUSPEND;  in piix_pci_device_suspend()
1014 		spin_unlock_irqrestore(&host->lock, flags);  in piix_pci_device_suspend()
1027 	if (host->flags & PIIX_HOST_BROKEN_SUSPEND) {  in piix_pci_device_resume()
1028 		spin_lock_irqsave(&host->lock, flags);  in piix_pci_device_resume()
1029 		host->flags &= ~PIIX_HOST_BROKEN_SUSPEND;  in piix_pci_device_resume()
1030 		spin_unlock_irqrestore(&host->lock, flags);  in piix_pci_device_resume()
1041 			dev_err(&pdev->dev,  in piix_pci_device_resume()
1111 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1119 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1124 	[ich_pata_33] =		/* ICH0 - ICH at 33Mhz*/
1227 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1285 		return -ENOMEM;  in piix_disable_ahci()
1294 			rc = -EIO;  in piix_disable_ahci()
1302  *	piix_check_450nx_errata	-	Check for problem 450NX setup
1319 		/* Only on the original revision: IDE DMA can hang */  in piix_check_450nx_errata()
1320 		if (pdev->revision == 0x00)  in piix_check_450nx_errata()
1322 		/* On all revisions below 5 PXB bus lock must be disabled for IDE */  in piix_check_450nx_errata()
1323 		else if (cfg & (1<<14) && pdev->revision < 5)  in piix_check_450nx_errata()
1327 		dev_warn(&ata_dev->dev,  in piix_check_450nx_errata()
1328 			 "450NX errata present, disabling IDE DMA%s\n",  in piix_check_450nx_errata()
1329 			 no_piix_dma == 2 ? " - a BIOS update may resolve this"  in piix_check_450nx_errata()
1338 	struct pci_dev *pdev = to_pci_dev(host->dev);  in piix_init_pcs()
1343 	new_pcs = pcs | map_db->port_enable;  in piix_init_pcs()
1364 	map = map_db->map[map_value & map_db->mask];  in piix_init_sata_map()
1370 			p += scnprintf(p, end - p, " XX");  in piix_init_sata_map()
1374 			p += scnprintf(p, end - p, " --");  in piix_init_sata_map()
1377 		case IDE:  in piix_init_sata_map()
1378 			WARN_ON((i & 1) || map[i + 1] != IDE);  in piix_init_sata_map()
1381 			p += scnprintf(p, end - p, " IDE IDE");  in piix_init_sata_map()
1385 			p += scnprintf(p, end - p, " P%d", map[i]);  in piix_init_sata_map()
1391 	dev_info(&pdev->dev, "MAP [%s ]\n", buf);  in piix_init_sata_map()
1394 		dev_err(&pdev->dev, "invalid MAP value %u\n", map_value);  in piix_init_sata_map()
1401 	struct pci_dev *pdev = to_pci_dev(host->dev);  in piix_no_sidpr()
1404 	 * Samsung DB-P70 only has three ATA ports exposed and  in piix_no_sidpr()
1405 	 * curiously the unconnected first port reports link online  in piix_no_sidpr()
1413 	 * board, the port can't be disabled solely with the  in piix_no_sidpr()
1421 	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&  in piix_no_sidpr()
1422 	    pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&  in piix_no_sidpr()
1423 	    pdev->subsystem_device == 0xb049) {  in piix_no_sidpr()
1424 		dev_warn(host->dev,  in piix_no_sidpr()
1425 			 "Samsung DB-P70 detected, disabling SIDPR\n");  in piix_no_sidpr()
1434 	struct pci_dev *pdev = to_pci_dev(host->dev);  in piix_init_sidpr()
1435 	struct piix_host_priv *hpriv = host->private_data;  in piix_init_sidpr()
1436 	struct ata_link *link0 = &host->ports[0]->link;  in piix_init_sidpr()
1442 		if (hpriv->map[i] == IDE)  in piix_init_sidpr()
1449 	if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))  in piix_init_sidpr()
1459 	hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR];  in piix_init_sidpr()
1468 	 * un-inhibit power save modes as BIOS might have inhibited  in piix_init_sidpr()
1477 			dev_info(host->dev,  in piix_init_sidpr()
1485 		struct ata_port *ap = host->ports[i];  in piix_init_sidpr()
1487 		ap->ops = &piix_sidpr_sata_ops;  in piix_init_sidpr()
1489 		if (ap->flags & ATA_FLAG_SLAVE_POSS) {  in piix_init_sidpr()
1516 	struct pci_dev *pdev = to_pci_dev(host->dev);  in piix_iocfg_bit18_quirk()
1517 	struct piix_host_priv *hpriv = host->private_data;  in piix_iocfg_bit18_quirk()
1526 	if (hpriv->saved_iocfg & (1 << 18)) {  in piix_iocfg_bit18_quirk()
1527 		dev_info(&pdev->dev, "applying IOCFG bit18 quirk\n");  in piix_iocfg_bit18_quirk()
1529 				       hpriv->saved_iocfg & ~(1 << 18));  in piix_iocfg_bit18_quirk()
1539 				DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),  in piix_broken_system_poweroff()
1548 				DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),  in piix_broken_system_poweroff()
1560 		unsigned long slot = (unsigned long)dmi->driver_data;  in piix_broken_system_poweroff()
1561 		/* apply the quirk only to on-board controllers */  in piix_broken_system_poweroff()
1562 		return slot == PCI_SLOT(pdev->devfn);  in piix_broken_system_poweroff()
1571 	"Prefer Hyper-V paravirtualization drivers instead of ATA, "
1572 	"0 - Use ATA drivers, "
1573 	"1 (Default) - Use the paravirtualization drivers.");
1580 			/* On Hyper-V hypervisors the disks are exposed on  in piix_ignore_devices_quirk()
1586 			.ident = "Hyper-V Virtual Machine",  in piix_ignore_devices_quirk()
1598 			 * identical to a Hyper-V guest. One difference is the  in piix_ignore_devices_quirk()
1617 		host->flags |= ATA_HOST_IGNORE_ATA;  in piix_ignore_devices_quirk()
1618 		dev_info(host->dev, "%s detected, ATA device ignore set\n",  in piix_ignore_devices_quirk()
1619 			ignore->ident);  in piix_ignore_devices_quirk()
1625  *	piix_init_one - Register PIIX ATA PCI device with kernel services
1636  *	Zero on success, or -ERRNO value.
1641 	struct device *dev = &pdev->dev;  in piix_init_one()
1650 	ata_print_version_once(&pdev->dev, DRV_VERSION);  in piix_init_one()
1653 	if (!in_module_init && ent->driver_data >= ich5_sata)  in piix_init_one()
1654 		return -ENODEV;  in piix_init_one()
1657 		piix_port_info[ent->driver_data].flags |=  in piix_init_one()
1660 		dev_info(&pdev->dev, "quirky BIOS, skipping spindown "  in piix_init_one()
1664 	port_info[0] = piix_port_info[ent->driver_data];  in piix_init_one()
1665 	port_info[1] = piix_port_info[ent->driver_data];  in piix_init_one()
1676 		return -ENOMEM;  in piix_init_one()
1683 	pci_read_config_dword(pdev, PIIX_IOCFG, &hpriv->saved_iocfg);  in piix_init_one()
1689 	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {  in piix_init_one()
1697 		hpriv->map = piix_init_sata_map(pdev, port_info,  in piix_init_one()
1698 					piix_map_db_table[ent->driver_data]);  in piix_init_one()
1703 	host->private_data = hpriv;  in piix_init_one()
1707 		piix_init_pcs(host, piix_map_db_table[ent->driver_data]);  in piix_init_one()
1711 		if (host->ports[0]->ops == &piix_sidpr_sata_ops)  in piix_init_one()
1722 	 * message-signalled interrupts currently).  in piix_init_one()
1731 		host->ports[0]->mwdma_mask = 0;  in piix_init_one()
1732 		host->ports[0]->udma_mask = 0;  in piix_init_one()
1733 		host->ports[1]->mwdma_mask = 0;  in piix_init_one()
1734 		host->ports[1]->udma_mask = 0;  in piix_init_one()
1736 	host->flags |= ATA_HOST_PARALLEL_SCAN;  in piix_init_one()
1748 	struct piix_host_priv *hpriv = host->private_data;  in piix_remove_one()
1750 	pci_write_config_dword(pdev, PIIX_IOCFG, hpriv->saved_iocfg);  in piix_remove_one()