407 	struct acpi_iort_smmu_v3 *smmu;  in iort_get_id_mapping_index()  local
419 		smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in iort_get_id_mapping_index()
424 		if (smmu->event_gsiv && smmu->pri_gsiv && smmu->gerr_gsiv  in iort_get_id_mapping_index()
425 		    && smmu->sync_gsiv)  in iort_get_id_mapping_index()
428 		if (smmu->id_mapping_index >= node->mapping_count) {  in iort_get_id_mapping_index()
434 		return smmu->id_mapping_index;  in iort_get_id_mapping_index()
527 	 * as NC (named component) -> SMMU -> ITS. If the type is matched,  in iort_node_map_platform_id()
547 		 * device (such as SMMU, PMCG),its iort node already cached  in iort_find_dev_node()
799 		struct acpi_iort_smmu_v3 *smmu;  in iort_get_msi_resv_iommu()  local
801 		smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;  in iort_get_msi_resv_iommu()
802 		if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)  in iort_get_msi_resv_iommu()
898 		pr_warn("IORT node type %u does not describe an SMMU\n", type);  in iort_iommu_driver_enabled()
938 	 * the SMMU drivers have not been probed yet or that  in iort_iommu_xlate()
939 	 * the SMMU drivers are not built in the kernel;  in iort_iommu_xlate()
940 	 * Depending on whether the SMMU drivers are built-in  in iort_iommu_xlate()
1209 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_count_resources()  local
1214 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_count_resources()
1216 	if (smmu->event_gsiv)  in arm_smmu_v3_count_resources()
1219 	if (smmu->pri_gsiv)  in arm_smmu_v3_count_resources()
1222 	if (smmu->gerr_gsiv)  in arm_smmu_v3_count_resources()
1225 	if (smmu->sync_gsiv)  in arm_smmu_v3_count_resources()
1231 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)  in arm_smmu_v3_is_combined_irq()  argument
1237 	if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)  in arm_smmu_v3_is_combined_irq()
1241 	 * ThunderX2 doesn't support MSIs from the SMMU, so we're checking  in arm_smmu_v3_is_combined_irq()
1244 	return smmu->event_gsiv == smmu->pri_gsiv &&  in arm_smmu_v3_is_combined_irq()
1245 	       smmu->event_gsiv == smmu->gerr_gsiv &&  in arm_smmu_v3_is_combined_irq()
1246 	       smmu->event_gsiv == smmu->sync_gsiv;  in arm_smmu_v3_is_combined_irq()
1249 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)  in arm_smmu_v3_resource_size()  argument
1253 	 * which doesn't support the page 1 SMMU register space.  in arm_smmu_v3_resource_size()
1255 	if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)  in arm_smmu_v3_resource_size()
1264 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_init_resources()  local
1268 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_init_resources()
1270 	res[num_res].start = smmu->base_address;  in arm_smmu_v3_init_resources()
1271 	res[num_res].end = smmu->base_address +  in arm_smmu_v3_init_resources()
1272 				arm_smmu_v3_resource_size(smmu) - 1;  in arm_smmu_v3_init_resources()
1276 	if (arm_smmu_v3_is_combined_irq(smmu)) {  in arm_smmu_v3_init_resources()
1277 		if (smmu->event_gsiv)  in arm_smmu_v3_init_resources()
1278 			acpi_iort_register_irq(smmu->event_gsiv, "combined",  in arm_smmu_v3_init_resources()
1283 		if (smmu->event_gsiv)  in arm_smmu_v3_init_resources()
1284 			acpi_iort_register_irq(smmu->event_gsiv, "eventq",  in arm_smmu_v3_init_resources()
1288 		if (smmu->pri_gsiv)  in arm_smmu_v3_init_resources()
1289 			acpi_iort_register_irq(smmu->pri_gsiv, "priq",  in arm_smmu_v3_init_resources()
1293 		if (smmu->gerr_gsiv)  in arm_smmu_v3_init_resources()
1294 			acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",  in arm_smmu_v3_init_resources()
1298 		if (smmu->sync_gsiv)  in arm_smmu_v3_init_resources()
1299 			acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",  in arm_smmu_v3_init_resources()
1308 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_dma_configure()  local
1312 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_dma_configure()
1314 	attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?  in arm_smmu_v3_dma_configure()
1331 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_set_proximity()  local
1333 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_set_proximity()
1334 	if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {  in arm_smmu_v3_set_proximity()
1335 		int dev_node = pxm_to_node(smmu->pxm);  in arm_smmu_v3_set_proximity()
1341 		pr_info("SMMU-v3[%llx] Mapped to Proximity domain %d\n",  in arm_smmu_v3_set_proximity()
1342 			smmu->base_address,  in arm_smmu_v3_set_proximity()
1343 			smmu->pxm);  in arm_smmu_v3_set_proximity()
1353 	struct acpi_iort_smmu *smmu;  in arm_smmu_count_resources()  local
1355 	/* Retrieve SMMU specific data */  in arm_smmu_count_resources()
1356 	smmu = (struct acpi_iort_smmu *)node->node_data;  in arm_smmu_count_resources()
1366 	return smmu->context_interrupt_count + 2;  in arm_smmu_count_resources()
1372 	struct acpi_iort_smmu *smmu;  in arm_smmu_init_resources()  local
1376 	/* Retrieve SMMU specific data */  in arm_smmu_init_resources()
1377 	smmu = (struct acpi_iort_smmu *)node->node_data;  in arm_smmu_init_resources()
1379 	res[num_res].start = smmu->base_address;  in arm_smmu_init_resources()
1380 	res[num_res].end = smmu->base_address + smmu->span - 1;  in arm_smmu_init_resources()
1384 	glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);  in arm_smmu_init_resources()
1389 	acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,  in arm_smmu_init_resources()
1393 	ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);  in arm_smmu_init_resources()
1394 	for (i = 0; i < smmu->context_interrupt_count; i++) {  in arm_smmu_init_resources()
1398 		acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,  in arm_smmu_init_resources()
1406 	struct acpi_iort_smmu *smmu;  in arm_smmu_dma_configure()  local
1409 	/* Retrieve SMMU specific data */  in arm_smmu_dma_configure()
1410 	smmu = (struct acpi_iort_smmu *)node->node_data;  in arm_smmu_dma_configure()
1412 	attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?  in arm_smmu_dma_configure()
1415 	/* We expect the dma masks to be equivalent for SMMU set-ups */  in arm_smmu_dma_configure()
1491 	.name = "arm-smmu-v3",
1499 	.name = "arm-smmu",
1506 	.name = "arm-smmu-v3-pmcg",
1637 			 * If we detect a RC->SMMU mapping, make sure  in iort_enable_acs()