Lines Matching full:a7
168 s32i a7, a2, PT_AREG7
201 rsr a7, epc1 # load exception address
203 and a3, a3, a7 # mask lower bits
208 __ssa8 a7
247 addi a7, a7, 2 # increment PC (assume 16-bit insn)
252 addi a7, a7, 1
254 addi a7, a7, 3
328 l32i a7, a2, PT_AREG7
344 1: # a7: instruction pointer, a4: instruction, a3: value
349 addi a7, a7, 2 # incr. PC,assume 16-bit instruction
355 addi a7, a7, 1 # increment PC, 32-bit instruction
357 addi a7, a7, 3 # increment PC, 32-bit instruction
411 bne a7, a4, 1f
415 rsr a7, lbeg # set PC to LBEGIN
419 1: wsr a7, epc1 # skip emulated instruction
436 l32i a7, a2, PT_AREG7
457 l32i a7, a2, PT_AREG7