Lines Matching +full:memory +full:- +full:mapped
1 # SPDX-License-Identifier: GPL-2.0
47 Xtensa processors are 32-bit RISC machines designed by Tensilica
52 a home page at <http://www.linux-xtensa.org/>.
96 bool "fsf - default (not generic) configuration"
100 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
107 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
143 ie: it supports a TLB with auto-loading, page protection.
172 bool "Unaligned memory access in user space"
175 memory accesses in hardware but through an exception handler.
176 Per default, unaligned memory accesses are disabled in user space.
178 Say Y here to enable unaligned memory access in user space.
185 This option is used to indicate that the system-on-a-chip (SOC)
199 bool "Enable Symmetric multi-processing support"
208 int "Maximum number of CPUs (2-32)"
327 XT2000 is the name of Tensilica's feature-rich emulation platform.
368 architectures, you should supply some command-line options at build
370 memory size and the root device (e.g., mem=64M root=/dev/nfs).
393 tristate "Host file-based simulated block device support"
402 int "Number of host file-based simulated block devices"
425 Another simulated disk in a host file for a buildroot-independent
450 bool "Use 8-bit access to XTFPGA LCD"
454 LCD may be connected with 4- or 8-bit interface, 8-bit access may
455 only be used with 8-bit interface. Please consult prototyping user
458 comment "Kernel memory layout"
468 then enter your normal kernel breakpoints once the MMU was mapped
471 This unfortunately won't work for U-Boot and likely also wont
477 xt-gdb can't place a Software Breakpoint in the 0XD region prior
478 to mapping the MMU and after mapping even if the area of low memory
479 was mapped gdb wouldn't remove the breakpoint on hitting it as the
485 Selecting this will cause U-Boot to set the KERNEL Load and Entry
486 address at 0x00003000 instead of the mapped std of 0xD0003000.
491 bool "Kernel Execute-In-Place from ROM"
494 Execute-In-Place allows the kernel to run from non-volatile storage
497 to RAM. Read-write sections, such as the data section and stack,
503 store the kernel image depending on your own flash memory usage.
507 ROM memory will be arch/xtensa/boot/xipImage.
512 hex "Cache attributes for the memory address space"
517 specifies cache attributes for the corresponding 512MB memory
518 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
519 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
538 2: WB, no-write-allocate cache,
547 This is the physical address where KSEG is mapped. Please refer to
551 Physical memory below this address is not available to linux.
560 This is the virtual address where the XIP kernel is mapped.
561 XIP kernel may be mapped into KSEG or KIO region, virtual address
584 placed at their hardware-defined locations.
601 XIP-aware MTD support.
643 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
667 bool "High Memory Support"
672 lowermost 128 MB of memory linearly to the areas starting
674 When there are more than 128 MB memory in the system not
675 all of it can be "permanently mapped" by the kernel.
676 The physical memory that's not permanently mapped is called
677 "high memory".
689 The kernel memory allocator divides physically contiguous memory
692 keeps in the memory allocator. If you need to allocate very large
693 blocks of physically contiguous memory, then you may need to
697 a value of 11 means that the largest free memory block is 2^10 pages.