Lines Matching +full:default +full:- +full:on
1 # SPDX-License-Identifier: GPL-2.0
47 Xtensa processors are 32-bit RISC machines designed by Tensilica
52 a home page at <http://www.linux-xtensa.org/>.
68 default 100
87 default 0x6e400000
93 default XTENSA_VARIANT_FSF
96 bool "fsf - default (not generic) configuration"
100 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
107 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
123 depends on XTENSA_VARIANT_CUSTOM
131 default "dc232b" if XTENSA_VARIANT_DC232B
132 default "dc233c" if XTENSA_VARIANT_DC233C
133 default "fsf" if XTENSA_VARIANT_FSF
134 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
138 depends on XTENSA_VARIANT_CUSTOM
139 default y
143 ie: it supports a TLB with auto-loading, page protection.
147 depends on XTENSA_VARIANT_CUSTOM
148 default n
157 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
158 default n
176 Per default, unaligned memory accesses are disabled in user space.
182 depends on XTENSA_VARIANT_CUSTOM
185 This option is used to indicate that the system-on-a-chip (SOC)
196 You still have to select "Enable SMP" to enable SMP on this SOC.
199 bool "Enable Symmetric multi-processing support"
200 depends on HAVE_SMP
207 depends on SMP
208 int "Maximum number of CPUs (2-32)"
210 default "4"
214 depends on SMP
216 Say Y here to allow turning CPUs off and on. CPUs can be
223 default n
226 on UP kernel when processor has no s32c1i support.
236 default n
252 default USER_ABI_DEFAULT
256 If unsure, choose the default ABI.
259 bool "Default ABI only"
261 Assume default userspace ABI. For XEA2 cores it is windowed ABI.
262 call0 ABI binaries may be run on such kernel, but signal delivery
271 an illegal instruction exception on the first 'entry' opcode.
283 used to turn on PS.WOE bit on the first 'entry' opcode executed by
290 raise an illegal instruction exception on cores with XEA2 when
300 On some platforms (XT2000, for example), the CPU clock rate can
314 default XTENSA_PLATFORM_ISS
327 XT2000 is the name of Tensilica's feature-rich emulation platform.
345 default 3 if XTENSA_PLATFORM_XT2000
346 default 0
350 depends on !XTENSA_CALIBRATE_CCOUNT
351 default 16
359 bool "Default bootloader kernel arguments"
363 depends on CMDLINE_BOOL
364 default "console=ttyS0,38400 root=/dev/ram"
366 On some architectures (EBSA110 and CATS), there is currently no way
368 architectures, you should supply some command-line options at build
381 depends on OF
385 default y
393 tristate "Host file-based simulated block device support"
394 default n
395 depends on XTENSA_PLATFORM_ISS && BLOCK
402 int "Number of host file-based simulated block devices"
404 depends on BLK_DEV_SIMDISK
405 default 2
407 This is the default minimal number of created block devices.
414 depends on BLK_DEV_SIMDISK = y
415 default ""
422 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
423 default ""
425 Another simulated disk in a host file for a buildroot-independent
430 depends on XTENSA_PLATFORM_XTFPGA
431 default n
433 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
441 depends on XTFPGA_LCD
442 default "0x0d0c0000"
450 bool "Use 8-bit access to XTFPGA LCD"
451 depends on XTFPGA_LCD
452 default n
454 LCD may be connected with 4- or 8-bit interface, 8-bit access may
455 only be used with 8-bit interface. Please consult prototyping user
462 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
463 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
471 This unfortunately won't work for U-Boot and likely also wont
477 xt-gdb can't place a Software Breakpoint in the 0XD region prior
479 was mapped gdb wouldn't remove the breakpoint on hitting it as the
485 Selecting this will cause U-Boot to set the KERNEL Load and Entry
491 bool "Kernel Execute-In-Place from ROM"
492 depends on PLATFORM_HAVE_XIP
494 Execute-In-Place allows the kernel to run from non-volatile storage
497 to RAM. Read-write sections, such as the data section and stack,
503 store the kernel image depending on your own flash memory usage.
513 depends on !MMU
514 default 0x22222222
518 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
519 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
538 2: WB, no-write-allocate cache,
544 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
545 default 0x00000000
553 If unsure, leave the default value here.
557 depends on MMU && XIP_KERNEL
558 default 0xd0003000
567 default 0x60003000 if !MMU
568 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
569 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
575 If unsure, leave the default value here.
579 default XTENSA_VECTORS_IN_TEXT
584 placed at their hardware-defined locations.
588 depends on !MTD_XIP
600 Use it to put vectors into IRAM or out of FLASH on kernels with
601 XIP-aware MTD support.
607 default 0x00000000
608 depends on XTENSA_VECTORS_SEPARATE
615 depends on XIP_KERNEL
616 default 0x00000000
627 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
628 default 0x00000000
633 If unsure, leave the default value here.
637 depends on MMU
638 default XTENSA_KSEG_MMU_V2
650 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
658 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
668 depends on MMU
671 default. However, the default MMUv2 setup only maps the
679 If you are compiling a kernel which will never run on a
687 default "11"