3457 __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level)  in __is_rsvd_bits_set()  argument
3461 	return pte & rsvd_check->rsvd_bits_mask[bit7][level-1];  in __is_rsvd_bits_set()
3464 static bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, u64 pte)  in __is_bad_mt_xwr()  argument
3466 	return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f);  in __is_bad_mt_xwr()
3519 	struct rsvd_bits_validate *rsvd_check;  in get_mmio_spte()  local
3535 	rsvd_check = &vcpu->arch.mmu->shadow_zero_check;  in get_mmio_spte()
3545 		reserved |= __is_bad_mt_xwr(rsvd_check, sptes[level - 1]) |  in get_mmio_spte()
3546 			    __is_rsvd_bits_set(rsvd_check, sptes[level - 1],  in get_mmio_spte()
3971 			struct rsvd_bits_validate *rsvd_check,  in __reset_rsvds_bits_mask()  argument
3979 	rsvd_check->bad_mt_xwr = 0;  in __reset_rsvds_bits_mask()
3996 		rsvd_check->rsvd_bits_mask[0][1] = 0;  in __reset_rsvds_bits_mask()
3997 		rsvd_check->rsvd_bits_mask[0][0] = 0;  in __reset_rsvds_bits_mask()
3998 		rsvd_check->rsvd_bits_mask[1][0] =  in __reset_rsvds_bits_mask()
3999 			rsvd_check->rsvd_bits_mask[0][0];  in __reset_rsvds_bits_mask()
4002 			rsvd_check->rsvd_bits_mask[1][1] = 0;  in __reset_rsvds_bits_mask()
4008 			rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);  in __reset_rsvds_bits_mask()
4011 			rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);  in __reset_rsvds_bits_mask()
4014 		rsvd_check->rsvd_bits_mask[0][2] =  in __reset_rsvds_bits_mask()
4017 		rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4019 		rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4021 		rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4024 		rsvd_check->rsvd_bits_mask[1][0] =  in __reset_rsvds_bits_mask()
4025 			rsvd_check->rsvd_bits_mask[0][0];  in __reset_rsvds_bits_mask()
4028 		rsvd_check->rsvd_bits_mask[0][4] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4031 		rsvd_check->rsvd_bits_mask[1][4] =  in __reset_rsvds_bits_mask()
4032 			rsvd_check->rsvd_bits_mask[0][4];  in __reset_rsvds_bits_mask()
4035 		rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4038 		rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4041 		rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4043 		rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4045 		rsvd_check->rsvd_bits_mask[1][3] =  in __reset_rsvds_bits_mask()
4046 			rsvd_check->rsvd_bits_mask[0][3];  in __reset_rsvds_bits_mask()
4047 		rsvd_check->rsvd_bits_mask[1][2] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4050 		rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd |  in __reset_rsvds_bits_mask()
4053 		rsvd_check->rsvd_bits_mask[1][0] =  in __reset_rsvds_bits_mask()
4054 			rsvd_check->rsvd_bits_mask[0][0];  in __reset_rsvds_bits_mask()
4071 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,  in __reset_rsvds_bits_mask_ept()  argument
4076 	rsvd_check->rsvd_bits_mask[0][4] =  in __reset_rsvds_bits_mask_ept()
4078 	rsvd_check->rsvd_bits_mask[0][3] =  in __reset_rsvds_bits_mask_ept()
4080 	rsvd_check->rsvd_bits_mask[0][2] =  in __reset_rsvds_bits_mask_ept()
4082 	rsvd_check->rsvd_bits_mask[0][1] =  in __reset_rsvds_bits_mask_ept()
4084 	rsvd_check->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51);  in __reset_rsvds_bits_mask_ept()
4087 	rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];  in __reset_rsvds_bits_mask_ept()
4088 	rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];  in __reset_rsvds_bits_mask_ept()
4089 	rsvd_check->rsvd_bits_mask[1][2] =  in __reset_rsvds_bits_mask_ept()
4091 	rsvd_check->rsvd_bits_mask[1][1] =  in __reset_rsvds_bits_mask_ept()
4093 	rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];  in __reset_rsvds_bits_mask_ept()
4104 	rsvd_check->bad_mt_xwr = bad_mt_xwr;  in __reset_rsvds_bits_mask_ept()