Lines Matching refs:apic
78 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi() local
80 return apic_test_vector(vector, apic->regs + APIC_ISR) || in kvm_apic_pending_eoi()
81 apic_test_vector(vector, apic->regs + APIC_IRR); in kvm_apic_pending_eoi()
97 static inline int apic_enabled(struct kvm_lapic *apic) in apic_enabled() argument
99 return kvm_apic_sw_enabled(apic) && kvm_apic_hw_enabled(apic); in apic_enabled()
109 static inline u32 kvm_x2apic_id(struct kvm_lapic *apic) in kvm_x2apic_id() argument
111 return apic->vcpu->vcpu_id; in kvm_x2apic_id()
209 max_id = max(max_id, kvm_x2apic_id(vcpu->arch.apic)); in kvm_recalculate_apic_map()
221 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_apic_map() local
231 xapic_id = kvm_xapic_id(apic); in kvm_recalculate_apic_map()
232 x2apic_id = kvm_x2apic_id(apic); in kvm_recalculate_apic_map()
235 if ((apic_x2apic_mode(apic) || x2apic_id > 0xff) && in kvm_recalculate_apic_map()
237 new->phys_map[x2apic_id] = apic; in kvm_recalculate_apic_map()
242 if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) in kvm_recalculate_apic_map()
243 new->phys_map[xapic_id] = apic; in kvm_recalculate_apic_map()
245 if (!kvm_apic_sw_enabled(apic)) in kvm_recalculate_apic_map()
248 ldr = kvm_lapic_get_reg(apic, APIC_LDR); in kvm_recalculate_apic_map()
250 if (apic_x2apic_mode(apic)) { in kvm_recalculate_apic_map()
254 if (kvm_lapic_get_reg(apic, APIC_DFR) == APIC_DFR_FLAT) in kvm_recalculate_apic_map()
264 cluster[ffs(mask) - 1] = apic; in kvm_recalculate_apic_map()
284 static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) in apic_set_spiv() argument
288 kvm_lapic_set_reg(apic, APIC_SPIV, val); in apic_set_spiv()
290 if (enabled != apic->sw_enabled) { in apic_set_spiv()
291 apic->sw_enabled = enabled; in apic_set_spiv()
297 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in apic_set_spiv()
301 static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) in kvm_apic_set_xapic_id() argument
303 kvm_lapic_set_reg(apic, APIC_ID, id << 24); in kvm_apic_set_xapic_id()
304 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_xapic_id()
307 static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id) in kvm_apic_set_ldr() argument
309 kvm_lapic_set_reg(apic, APIC_LDR, id); in kvm_apic_set_ldr()
310 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_ldr()
313 static inline void kvm_apic_set_dfr(struct kvm_lapic *apic, u32 val) in kvm_apic_set_dfr() argument
315 kvm_lapic_set_reg(apic, APIC_DFR, val); in kvm_apic_set_dfr()
316 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_dfr()
324 static inline void kvm_apic_set_x2apic_id(struct kvm_lapic *apic, u32 id) in kvm_apic_set_x2apic_id() argument
328 WARN_ON_ONCE(id != apic->vcpu->vcpu_id); in kvm_apic_set_x2apic_id()
330 kvm_lapic_set_reg(apic, APIC_ID, id); in kvm_apic_set_x2apic_id()
331 kvm_lapic_set_reg(apic, APIC_LDR, ldr); in kvm_apic_set_x2apic_id()
332 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_x2apic_id()
335 static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type) in apic_lvt_enabled() argument
337 return !(kvm_lapic_get_reg(apic, lvt_type) & APIC_LVT_MASKED); in apic_lvt_enabled()
340 static inline int apic_lvtt_oneshot(struct kvm_lapic *apic) in apic_lvtt_oneshot() argument
342 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_ONESHOT; in apic_lvtt_oneshot()
345 static inline int apic_lvtt_period(struct kvm_lapic *apic) in apic_lvtt_period() argument
347 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_PERIODIC; in apic_lvtt_period()
350 static inline int apic_lvtt_tscdeadline(struct kvm_lapic *apic) in apic_lvtt_tscdeadline() argument
352 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_TSCDEADLINE; in apic_lvtt_tscdeadline()
362 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_version() local
378 kvm_lapic_set_reg(apic, APIC_LVR, v); in kvm_apic_set_version()
450 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_irr() local
452 return __kvm_apic_update_irr(pir, apic->regs, max_irr); in kvm_apic_update_irr()
456 static inline int apic_search_irr(struct kvm_lapic *apic) in apic_search_irr() argument
458 return find_highest_vector(apic->regs + APIC_IRR); in apic_search_irr()
461 static inline int apic_find_highest_irr(struct kvm_lapic *apic) in apic_find_highest_irr() argument
469 if (!apic->irr_pending) in apic_find_highest_irr()
472 result = apic_search_irr(apic); in apic_find_highest_irr()
478 static inline void apic_clear_irr(int vec, struct kvm_lapic *apic) in apic_clear_irr() argument
482 vcpu = apic->vcpu; in apic_clear_irr()
486 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
488 apic_find_highest_irr(apic)); in apic_clear_irr()
490 apic->irr_pending = false; in apic_clear_irr()
491 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
492 if (apic_search_irr(apic) != -1) in apic_clear_irr()
493 apic->irr_pending = true; in apic_clear_irr()
499 apic_clear_irr(vec, vcpu->arch.apic); in kvm_apic_clear_irr()
503 static inline void apic_set_isr(int vec, struct kvm_lapic *apic) in apic_set_isr() argument
507 if (__apic_test_and_set_vector(vec, apic->regs + APIC_ISR)) in apic_set_isr()
510 vcpu = apic->vcpu; in apic_set_isr()
520 ++apic->isr_count; in apic_set_isr()
521 BUG_ON(apic->isr_count > MAX_APIC_VECTOR); in apic_set_isr()
527 apic->highest_isr_cache = vec; in apic_set_isr()
531 static inline int apic_find_highest_isr(struct kvm_lapic *apic) in apic_find_highest_isr() argument
539 if (!apic->isr_count) in apic_find_highest_isr()
541 if (likely(apic->highest_isr_cache != -1)) in apic_find_highest_isr()
542 return apic->highest_isr_cache; in apic_find_highest_isr()
544 result = find_highest_vector(apic->regs + APIC_ISR); in apic_find_highest_isr()
550 static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) in apic_clear_isr() argument
553 if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) in apic_clear_isr()
556 vcpu = apic->vcpu; in apic_clear_isr()
567 apic_find_highest_isr(apic)); in apic_clear_isr()
569 --apic->isr_count; in apic_clear_isr()
570 BUG_ON(apic->isr_count < 0); in apic_clear_isr()
571 apic->highest_isr_cache = -1; in apic_clear_isr()
582 return apic_find_highest_irr(vcpu->arch.apic); in kvm_lapic_find_highest_irr()
586 static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
593 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_irq() local
595 return __apic_accept_irq(apic, irq->delivery_mode, irq->vector, in kvm_apic_set_irq()
700 static int apic_has_interrupt_for_ppr(struct kvm_lapic *apic, u32 ppr) in apic_has_interrupt_for_ppr() argument
703 if (apic->vcpu->arch.apicv_active) in apic_has_interrupt_for_ppr()
704 highest_irr = kvm_x86_ops.sync_pir_to_irr(apic->vcpu); in apic_has_interrupt_for_ppr()
706 highest_irr = apic_find_highest_irr(apic); in apic_has_interrupt_for_ppr()
712 static bool __apic_update_ppr(struct kvm_lapic *apic, u32 *new_ppr) in __apic_update_ppr() argument
717 old_ppr = kvm_lapic_get_reg(apic, APIC_PROCPRI); in __apic_update_ppr()
718 tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI); in __apic_update_ppr()
719 isr = apic_find_highest_isr(apic); in __apic_update_ppr()
729 kvm_lapic_set_reg(apic, APIC_PROCPRI, ppr); in __apic_update_ppr()
734 static void apic_update_ppr(struct kvm_lapic *apic) in apic_update_ppr() argument
738 if (__apic_update_ppr(apic, &ppr) && in apic_update_ppr()
739 apic_has_interrupt_for_ppr(apic, ppr) != -1) in apic_update_ppr()
740 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_update_ppr()
745 apic_update_ppr(vcpu->arch.apic); in kvm_apic_update_ppr()
749 static void apic_set_tpr(struct kvm_lapic *apic, u32 tpr) in apic_set_tpr() argument
751 kvm_lapic_set_reg(apic, APIC_TASKPRI, tpr); in apic_set_tpr()
752 apic_update_ppr(apic); in apic_set_tpr()
755 static bool kvm_apic_broadcast(struct kvm_lapic *apic, u32 mda) in kvm_apic_broadcast() argument
757 return mda == (apic_x2apic_mode(apic) ? in kvm_apic_broadcast()
761 static bool kvm_apic_match_physical_addr(struct kvm_lapic *apic, u32 mda) in kvm_apic_match_physical_addr() argument
763 if (kvm_apic_broadcast(apic, mda)) in kvm_apic_match_physical_addr()
766 if (apic_x2apic_mode(apic)) in kvm_apic_match_physical_addr()
767 return mda == kvm_x2apic_id(apic); in kvm_apic_match_physical_addr()
775 if (kvm_x2apic_id(apic) > 0xff && mda == kvm_x2apic_id(apic)) in kvm_apic_match_physical_addr()
778 return mda == kvm_xapic_id(apic); in kvm_apic_match_physical_addr()
781 static bool kvm_apic_match_logical_addr(struct kvm_lapic *apic, u32 mda) in kvm_apic_match_logical_addr() argument
785 if (kvm_apic_broadcast(apic, mda)) in kvm_apic_match_logical_addr()
788 logical_id = kvm_lapic_get_reg(apic, APIC_LDR); in kvm_apic_match_logical_addr()
790 if (apic_x2apic_mode(apic)) in kvm_apic_match_logical_addr()
796 switch (kvm_lapic_get_reg(apic, APIC_DFR)) { in kvm_apic_match_logical_addr()
838 struct kvm_lapic *target = vcpu->arch.apic; in kvm_apic_match_dest()
1056 static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, in __apic_accept_irq() argument
1061 struct kvm_vcpu *vcpu = apic->vcpu; in __apic_accept_irq()
1074 if (unlikely(!apic_enabled(apic))) in __apic_accept_irq()
1084 if (apic_test_vector(vector, apic->regs + APIC_TMR) != !!trig_mode) { in __apic_accept_irq()
1087 apic->regs + APIC_TMR); in __apic_accept_irq()
1090 apic->regs + APIC_TMR); in __apic_accept_irq()
1094 kvm_lapic_set_irr(vector, apic); in __apic_accept_irq()
1123 apic->pending_events = (1UL << KVM_APIC_INIT); in __apic_accept_irq()
1131 apic->sipi_vector = vector; in __apic_accept_irq()
1134 set_bit(KVM_APIC_SIPI, &apic->pending_events); in __apic_accept_irq()
1204 static bool kvm_ioapic_handles_vector(struct kvm_lapic *apic, int vector) in kvm_ioapic_handles_vector() argument
1206 return test_bit(vector, apic->vcpu->arch.ioapic_handled_vectors); in kvm_ioapic_handles_vector()
1209 static void kvm_ioapic_send_eoi(struct kvm_lapic *apic, int vector) in kvm_ioapic_send_eoi() argument
1214 if (!kvm_ioapic_handles_vector(apic, vector)) in kvm_ioapic_send_eoi()
1218 if (irqchip_split(apic->vcpu->kvm)) { in kvm_ioapic_send_eoi()
1219 apic->vcpu->arch.pending_ioapic_eoi = vector; in kvm_ioapic_send_eoi()
1220 kvm_make_request(KVM_REQ_IOAPIC_EOI_EXIT, apic->vcpu); in kvm_ioapic_send_eoi()
1224 if (apic_test_vector(vector, apic->regs + APIC_TMR)) in kvm_ioapic_send_eoi()
1229 kvm_ioapic_update_eoi(apic->vcpu, vector, trigger_mode); in kvm_ioapic_send_eoi()
1232 static int apic_set_eoi(struct kvm_lapic *apic) in apic_set_eoi() argument
1234 int vector = apic_find_highest_isr(apic); in apic_set_eoi()
1236 trace_kvm_eoi(apic, vector); in apic_set_eoi()
1245 apic_clear_isr(vector, apic); in apic_set_eoi()
1246 apic_update_ppr(apic); in apic_set_eoi()
1248 if (test_bit(vector, vcpu_to_synic(apic->vcpu)->vec_bitmap)) in apic_set_eoi()
1249 kvm_hv_synic_send_eoi(apic->vcpu, vector); in apic_set_eoi()
1251 kvm_ioapic_send_eoi(apic, vector); in apic_set_eoi()
1252 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_set_eoi()
1262 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_eoi_accelerated() local
1264 trace_kvm_eoi(apic, vector); in kvm_apic_set_eoi_accelerated()
1266 kvm_ioapic_send_eoi(apic, vector); in kvm_apic_set_eoi_accelerated()
1267 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in kvm_apic_set_eoi_accelerated()
1271 void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high) in kvm_apic_send_ipi() argument
1282 if (apic_x2apic_mode(apic)) in kvm_apic_send_ipi()
1289 kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq, NULL); in kvm_apic_send_ipi()
1292 static u32 apic_get_tmcct(struct kvm_lapic *apic) in apic_get_tmcct() argument
1298 ASSERT(apic != NULL); in apic_get_tmcct()
1301 if (kvm_lapic_get_reg(apic, APIC_TMICT) == 0 || in apic_get_tmcct()
1302 apic->lapic_timer.period == 0) in apic_get_tmcct()
1306 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in apic_get_tmcct()
1310 ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period); in apic_get_tmcct()
1312 (APIC_BUS_CYCLE_NS * apic->divide_count)); in apic_get_tmcct()
1317 static void __report_tpr_access(struct kvm_lapic *apic, bool write) in __report_tpr_access() argument
1319 struct kvm_vcpu *vcpu = apic->vcpu; in __report_tpr_access()
1327 static inline void report_tpr_access(struct kvm_lapic *apic, bool write) in report_tpr_access() argument
1329 if (apic->vcpu->arch.tpr_access_reporting) in report_tpr_access()
1330 __report_tpr_access(apic, write); in report_tpr_access()
1333 static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset) in __apic_read() argument
1345 if (apic_lvtt_tscdeadline(apic)) in __apic_read()
1348 val = apic_get_tmcct(apic); in __apic_read()
1351 apic_update_ppr(apic); in __apic_read()
1352 val = kvm_lapic_get_reg(apic, offset); in __apic_read()
1355 report_tpr_access(apic, false); in __apic_read()
1358 val = kvm_lapic_get_reg(apic, offset); in __apic_read()
1374 int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len, in kvm_lapic_reg_read() argument
1405 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_read()
1411 result = __apic_read(apic, offset & ~0xf); in kvm_lapic_reg_read()
1430 static int apic_mmio_in_range(struct kvm_lapic *apic, gpa_t addr) in apic_mmio_in_range() argument
1432 return addr >= apic->base_address && in apic_mmio_in_range()
1433 addr < apic->base_address + LAPIC_MMIO_LENGTH; in apic_mmio_in_range()
1439 struct kvm_lapic *apic = to_lapic(this); in apic_mmio_read() local
1440 u32 offset = address - apic->base_address; in apic_mmio_read()
1442 if (!apic_mmio_in_range(apic, address)) in apic_mmio_read()
1445 if (!kvm_apic_hw_enabled(apic) || apic_x2apic_mode(apic)) { in apic_mmio_read()
1454 kvm_lapic_reg_read(apic, offset, len, data); in apic_mmio_read()
1459 static void update_divide_count(struct kvm_lapic *apic) in update_divide_count() argument
1463 tdcr = kvm_lapic_get_reg(apic, APIC_TDCR); in update_divide_count()
1466 apic->divide_count = 0x1 << (tmp2 & 0x7); in update_divide_count()
1469 static void limit_periodic_timer_frequency(struct kvm_lapic *apic) in limit_periodic_timer_frequency() argument
1476 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in limit_periodic_timer_frequency()
1479 if (apic->lapic_timer.period < min_period) { in limit_periodic_timer_frequency()
1483 apic->vcpu->vcpu_id, in limit_periodic_timer_frequency()
1484 apic->lapic_timer.period, min_period); in limit_periodic_timer_frequency()
1485 apic->lapic_timer.period = min_period; in limit_periodic_timer_frequency()
1490 static void cancel_hv_timer(struct kvm_lapic *apic);
1492 static void apic_update_lvtt(struct kvm_lapic *apic) in apic_update_lvtt() argument
1494 u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) & in apic_update_lvtt()
1495 apic->lapic_timer.timer_mode_mask; in apic_update_lvtt()
1497 if (apic->lapic_timer.timer_mode != timer_mode) { in apic_update_lvtt()
1498 if (apic_lvtt_tscdeadline(apic) != (timer_mode == in apic_update_lvtt()
1500 hrtimer_cancel(&apic->lapic_timer.timer); in apic_update_lvtt()
1502 if (apic->lapic_timer.hv_timer_in_use) in apic_update_lvtt()
1503 cancel_hv_timer(apic); in apic_update_lvtt()
1505 kvm_lapic_set_reg(apic, APIC_TMICT, 0); in apic_update_lvtt()
1506 apic->lapic_timer.period = 0; in apic_update_lvtt()
1507 apic->lapic_timer.tscdeadline = 0; in apic_update_lvtt()
1509 apic->lapic_timer.timer_mode = timer_mode; in apic_update_lvtt()
1510 limit_periodic_timer_frequency(apic); in apic_update_lvtt()
1521 struct kvm_lapic *apic = vcpu->arch.apic; in lapic_timer_int_injected() local
1522 u32 reg = kvm_lapic_get_reg(apic, APIC_LVTT); in lapic_timer_int_injected()
1524 if (kvm_apic_hw_enabled(apic)) { in lapic_timer_int_injected()
1526 void *bitmap = apic->regs + APIC_ISR; in lapic_timer_int_injected()
1529 bitmap = apic->regs + APIC_IRR; in lapic_timer_int_injected()
1539 u64 timer_advance_ns = vcpu->arch.apic->lapic_timer.timer_advance_ns; in __wait_lapic_expire()
1560 struct kvm_lapic *apic = vcpu->arch.apic; in adjust_lapic_timer_advance() local
1561 u32 timer_advance_ns = apic->lapic_timer.timer_advance_ns; in adjust_lapic_timer_advance()
1583 apic->lapic_timer.timer_advance_ns = timer_advance_ns; in adjust_lapic_timer_advance()
1588 struct kvm_lapic *apic = vcpu->arch.apic; in __kvm_wait_lapic_expire() local
1591 tsc_deadline = apic->lapic_timer.expired_tscdeadline; in __kvm_wait_lapic_expire()
1592 apic->lapic_timer.expired_tscdeadline = 0; in __kvm_wait_lapic_expire()
1594 apic->lapic_timer.advance_expire_delta = guest_tsc - tsc_deadline; in __kvm_wait_lapic_expire()
1600 adjust_lapic_timer_advance(vcpu, apic->lapic_timer.advance_expire_delta); in __kvm_wait_lapic_expire()
1606 vcpu->arch.apic->lapic_timer.expired_tscdeadline && in kvm_wait_lapic_expire()
1607 vcpu->arch.apic->lapic_timer.timer_advance_ns && in kvm_wait_lapic_expire()
1613 static void kvm_apic_inject_pending_timer_irqs(struct kvm_lapic *apic) in kvm_apic_inject_pending_timer_irqs() argument
1615 struct kvm_timer *ktimer = &apic->lapic_timer; in kvm_apic_inject_pending_timer_irqs()
1617 kvm_apic_local_deliver(apic, APIC_LVTT); in kvm_apic_inject_pending_timer_irqs()
1618 if (apic_lvtt_tscdeadline(apic)) { in kvm_apic_inject_pending_timer_irqs()
1620 } else if (apic_lvtt_oneshot(apic)) { in kvm_apic_inject_pending_timer_irqs()
1626 static void apic_timer_expired(struct kvm_lapic *apic, bool from_timer_fn) in apic_timer_expired() argument
1628 struct kvm_vcpu *vcpu = apic->vcpu; in apic_timer_expired()
1629 struct kvm_timer *ktimer = &apic->lapic_timer; in apic_timer_expired()
1631 if (atomic_read(&apic->lapic_timer.pending)) in apic_timer_expired()
1634 if (apic_lvtt_tscdeadline(apic) || ktimer->hv_timer_in_use) in apic_timer_expired()
1639 kvm_apic_inject_pending_timer_irqs(apic); in apic_timer_expired()
1643 if (kvm_use_posted_timer_interrupt(apic->vcpu)) { in apic_timer_expired()
1645 kvm_apic_inject_pending_timer_irqs(apic); in apic_timer_expired()
1649 atomic_inc(&apic->lapic_timer.pending); in apic_timer_expired()
1655 static void start_sw_tscdeadline(struct kvm_lapic *apic) in start_sw_tscdeadline() argument
1657 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_tscdeadline()
1661 struct kvm_vcpu *vcpu = apic->vcpu; in start_sw_tscdeadline()
1678 likely(ns > apic->lapic_timer.timer_advance_ns)) { in start_sw_tscdeadline()
1683 apic_timer_expired(apic, false); in start_sw_tscdeadline()
1688 static inline u64 tmict_to_ns(struct kvm_lapic *apic, u32 tmict) in tmict_to_ns() argument
1690 return (u64)tmict * APIC_BUS_CYCLE_NS * (u64)apic->divide_count; in tmict_to_ns()
1693 static void update_target_expiration(struct kvm_lapic *apic, uint32_t old_divisor) in update_target_expiration() argument
1698 apic->lapic_timer.period = in update_target_expiration()
1699 tmict_to_ns(apic, kvm_lapic_get_reg(apic, APIC_TMICT)); in update_target_expiration()
1700 limit_periodic_timer_frequency(apic); in update_target_expiration()
1703 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in update_target_expiration()
1709 apic->divide_count, old_divisor); in update_target_expiration()
1711 apic->lapic_timer.tscdeadline += in update_target_expiration()
1712 nsec_to_cycles(apic->vcpu, ns_remaining_new) - in update_target_expiration()
1713 nsec_to_cycles(apic->vcpu, ns_remaining_old); in update_target_expiration()
1714 apic->lapic_timer.target_expiration = ktime_add_ns(now, ns_remaining_new); in update_target_expiration()
1717 static bool set_target_expiration(struct kvm_lapic *apic, u32 count_reg) in set_target_expiration() argument
1724 apic->lapic_timer.period = in set_target_expiration()
1725 tmict_to_ns(apic, kvm_lapic_get_reg(apic, APIC_TMICT)); in set_target_expiration()
1727 if (!apic->lapic_timer.period) { in set_target_expiration()
1728 apic->lapic_timer.tscdeadline = 0; in set_target_expiration()
1732 limit_periodic_timer_frequency(apic); in set_target_expiration()
1733 deadline = apic->lapic_timer.period; in set_target_expiration()
1735 if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) { in set_target_expiration()
1737 deadline = tmict_to_ns(apic, in set_target_expiration()
1738 kvm_lapic_get_reg(apic, count_reg)); in set_target_expiration()
1740 deadline = apic->lapic_timer.period; in set_target_expiration()
1741 else if (unlikely(deadline > apic->lapic_timer.period)) { in set_target_expiration()
1746 apic->vcpu->vcpu_id, in set_target_expiration()
1748 kvm_lapic_get_reg(apic, count_reg), in set_target_expiration()
1749 deadline, apic->lapic_timer.period); in set_target_expiration()
1750 kvm_lapic_set_reg(apic, count_reg, 0); in set_target_expiration()
1751 deadline = apic->lapic_timer.period; in set_target_expiration()
1756 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in set_target_expiration()
1757 nsec_to_cycles(apic->vcpu, deadline); in set_target_expiration()
1758 apic->lapic_timer.target_expiration = ktime_add_ns(now, deadline); in set_target_expiration()
1763 static void advance_periodic_target_expiration(struct kvm_lapic *apic) in advance_periodic_target_expiration() argument
1776 apic->lapic_timer.target_expiration = in advance_periodic_target_expiration()
1777 ktime_add_ns(apic->lapic_timer.target_expiration, in advance_periodic_target_expiration()
1778 apic->lapic_timer.period); in advance_periodic_target_expiration()
1779 delta = ktime_sub(apic->lapic_timer.target_expiration, now); in advance_periodic_target_expiration()
1780 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in advance_periodic_target_expiration()
1781 nsec_to_cycles(apic->vcpu, delta); in advance_periodic_target_expiration()
1784 static void start_sw_period(struct kvm_lapic *apic) in start_sw_period() argument
1786 if (!apic->lapic_timer.period) in start_sw_period()
1790 apic->lapic_timer.target_expiration)) { in start_sw_period()
1791 apic_timer_expired(apic, false); in start_sw_period()
1793 if (apic_lvtt_oneshot(apic)) in start_sw_period()
1796 advance_periodic_target_expiration(apic); in start_sw_period()
1799 hrtimer_start(&apic->lapic_timer.timer, in start_sw_period()
1800 apic->lapic_timer.target_expiration, in start_sw_period()
1809 return vcpu->arch.apic->lapic_timer.hv_timer_in_use; in kvm_lapic_hv_timer_in_use()
1813 static void cancel_hv_timer(struct kvm_lapic *apic) in cancel_hv_timer() argument
1816 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in cancel_hv_timer()
1817 kvm_x86_ops.cancel_hv_timer(apic->vcpu); in cancel_hv_timer()
1818 apic->lapic_timer.hv_timer_in_use = false; in cancel_hv_timer()
1821 static bool start_hv_timer(struct kvm_lapic *apic) in start_hv_timer() argument
1823 struct kvm_timer *ktimer = &apic->lapic_timer; in start_hv_timer()
1824 struct kvm_vcpu *vcpu = apic->vcpu; in start_hv_timer()
1845 if (!apic_lvtt_period(apic)) { in start_hv_timer()
1851 cancel_hv_timer(apic); in start_hv_timer()
1853 apic_timer_expired(apic, false); in start_hv_timer()
1854 cancel_hv_timer(apic); in start_hv_timer()
1863 static void start_sw_timer(struct kvm_lapic *apic) in start_sw_timer() argument
1865 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_timer()
1868 if (apic->lapic_timer.hv_timer_in_use) in start_sw_timer()
1869 cancel_hv_timer(apic); in start_sw_timer()
1870 if (!apic_lvtt_period(apic) && atomic_read(&ktimer->pending)) in start_sw_timer()
1873 if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) in start_sw_timer()
1874 start_sw_period(apic); in start_sw_timer()
1875 else if (apic_lvtt_tscdeadline(apic)) in start_sw_timer()
1876 start_sw_tscdeadline(apic); in start_sw_timer()
1877 trace_kvm_hv_timer_state(apic->vcpu->vcpu_id, false); in start_sw_timer()
1880 static void restart_apic_timer(struct kvm_lapic *apic) in restart_apic_timer() argument
1884 if (!apic_lvtt_period(apic) && atomic_read(&apic->lapic_timer.pending)) in restart_apic_timer()
1887 if (!start_hv_timer(apic)) in restart_apic_timer()
1888 start_sw_timer(apic); in restart_apic_timer()
1895 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_expired_hv_timer() local
1899 if (!apic->lapic_timer.hv_timer_in_use) in kvm_lapic_expired_hv_timer()
1902 cancel_hv_timer(apic); in kvm_lapic_expired_hv_timer()
1903 apic_timer_expired(apic, false); in kvm_lapic_expired_hv_timer()
1905 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in kvm_lapic_expired_hv_timer()
1906 advance_periodic_target_expiration(apic); in kvm_lapic_expired_hv_timer()
1907 restart_apic_timer(apic); in kvm_lapic_expired_hv_timer()
1916 restart_apic_timer(vcpu->arch.apic); in kvm_lapic_switch_to_hv_timer()
1922 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_switch_to_sw_timer() local
1926 if (apic->lapic_timer.hv_timer_in_use) in kvm_lapic_switch_to_sw_timer()
1927 start_sw_timer(apic); in kvm_lapic_switch_to_sw_timer()
1934 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_restart_hv_timer() local
1936 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in kvm_lapic_restart_hv_timer()
1937 restart_apic_timer(apic); in kvm_lapic_restart_hv_timer()
1940 static void __start_apic_timer(struct kvm_lapic *apic, u32 count_reg) in __start_apic_timer() argument
1942 atomic_set(&apic->lapic_timer.pending, 0); in __start_apic_timer()
1944 if ((apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) in __start_apic_timer()
1945 && !set_target_expiration(apic, count_reg)) in __start_apic_timer()
1948 restart_apic_timer(apic); in __start_apic_timer()
1951 static void start_apic_timer(struct kvm_lapic *apic) in start_apic_timer() argument
1953 __start_apic_timer(apic, APIC_TMICT); in start_apic_timer()
1956 static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val) in apic_manage_nmi_watchdog() argument
1960 if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) { in apic_manage_nmi_watchdog()
1961 apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode; in apic_manage_nmi_watchdog()
1963 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
1965 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
1969 int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) in kvm_lapic_reg_write() argument
1977 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
1978 kvm_apic_set_xapic_id(apic, val >> 24); in kvm_lapic_reg_write()
1984 report_tpr_access(apic, true); in kvm_lapic_reg_write()
1985 apic_set_tpr(apic, val & 0xff); in kvm_lapic_reg_write()
1989 apic_set_eoi(apic); in kvm_lapic_reg_write()
1993 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
1994 kvm_apic_set_ldr(apic, val & APIC_LDR_MASK); in kvm_lapic_reg_write()
2000 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
2001 kvm_apic_set_dfr(apic, val | 0x0FFFFFFF); in kvm_lapic_reg_write()
2008 if (kvm_lapic_get_reg(apic, APIC_LVR) & APIC_LVR_DIRECTED_EOI) in kvm_lapic_reg_write()
2010 apic_set_spiv(apic, val & mask); in kvm_lapic_reg_write()
2016 lvt_val = kvm_lapic_get_reg(apic, in kvm_lapic_reg_write()
2018 kvm_lapic_set_reg(apic, APIC_LVTT + 0x10 * i, in kvm_lapic_reg_write()
2021 apic_update_lvtt(apic); in kvm_lapic_reg_write()
2022 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reg_write()
2030 kvm_apic_send_ipi(apic, val, kvm_lapic_get_reg(apic, APIC_ICR2)); in kvm_lapic_reg_write()
2031 kvm_lapic_set_reg(apic, APIC_ICR, val); in kvm_lapic_reg_write()
2035 if (!apic_x2apic_mode(apic)) in kvm_lapic_reg_write()
2037 kvm_lapic_set_reg(apic, APIC_ICR2, val); in kvm_lapic_reg_write()
2041 apic_manage_nmi_watchdog(apic, val); in kvm_lapic_reg_write()
2051 if (!kvm_apic_sw_enabled(apic)) in kvm_lapic_reg_write()
2057 kvm_lapic_set_reg(apic, reg, val); in kvm_lapic_reg_write()
2062 if (!kvm_apic_sw_enabled(apic)) in kvm_lapic_reg_write()
2064 val &= (apic_lvt_mask[0] | apic->lapic_timer.timer_mode_mask); in kvm_lapic_reg_write()
2065 kvm_lapic_set_reg(apic, APIC_LVTT, val); in kvm_lapic_reg_write()
2066 apic_update_lvtt(apic); in kvm_lapic_reg_write()
2070 if (apic_lvtt_tscdeadline(apic)) in kvm_lapic_reg_write()
2073 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reg_write()
2074 kvm_lapic_set_reg(apic, APIC_TMICT, val); in kvm_lapic_reg_write()
2075 start_apic_timer(apic); in kvm_lapic_reg_write()
2079 uint32_t old_divisor = apic->divide_count; in kvm_lapic_reg_write()
2081 kvm_lapic_set_reg(apic, APIC_TDCR, val & 0xb); in kvm_lapic_reg_write()
2082 update_divide_count(apic); in kvm_lapic_reg_write()
2083 if (apic->divide_count != old_divisor && in kvm_lapic_reg_write()
2084 apic->lapic_timer.period) { in kvm_lapic_reg_write()
2085 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reg_write()
2086 update_target_expiration(apic, old_divisor); in kvm_lapic_reg_write()
2087 restart_apic_timer(apic); in kvm_lapic_reg_write()
2092 if (apic_x2apic_mode(apic) && val != 0) in kvm_lapic_reg_write()
2097 if (apic_x2apic_mode(apic)) { in kvm_lapic_reg_write()
2098 kvm_lapic_reg_write(apic, APIC_ICR, in kvm_lapic_reg_write()
2108 kvm_recalculate_apic_map(apic->vcpu->kvm); in kvm_lapic_reg_write()
2117 struct kvm_lapic *apic = to_lapic(this); in apic_mmio_write() local
2118 unsigned int offset = address - apic->base_address; in apic_mmio_write()
2121 if (!apic_mmio_in_range(apic, address)) in apic_mmio_write()
2124 if (!kvm_apic_hw_enabled(apic) || apic_x2apic_mode(apic)) { in apic_mmio_write()
2142 kvm_lapic_reg_write(apic, offset & 0xff0, val); in apic_mmio_write()
2149 kvm_lapic_reg_write(vcpu->arch.apic, APIC_EOI, 0); in kvm_lapic_set_eoi()
2161 kvm_lapic_reg_read(vcpu->arch.apic, offset, 4, &val); in kvm_apic_write_nodecode()
2164 kvm_lapic_reg_write(vcpu->arch.apic, offset, val); in kvm_apic_write_nodecode()
2170 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_free_lapic() local
2172 if (!vcpu->arch.apic) in kvm_free_lapic()
2175 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_free_lapic()
2180 if (!apic->sw_enabled) in kvm_free_lapic()
2183 if (apic->regs) in kvm_free_lapic()
2184 free_page((unsigned long)apic->regs); in kvm_free_lapic()
2186 kfree(apic); in kvm_free_lapic()
2196 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_lapic_tscdeadline_msr() local
2198 if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic)) in kvm_get_lapic_tscdeadline_msr()
2201 return apic->lapic_timer.tscdeadline; in kvm_get_lapic_tscdeadline_msr()
2206 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_set_lapic_tscdeadline_msr() local
2208 if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic)) in kvm_set_lapic_tscdeadline_msr()
2211 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_set_lapic_tscdeadline_msr()
2212 apic->lapic_timer.tscdeadline = data; in kvm_set_lapic_tscdeadline_msr()
2213 start_apic_timer(apic); in kvm_set_lapic_tscdeadline_msr()
2218 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_set_tpr() local
2220 apic_set_tpr(apic, ((cr8 & 0x0f) << 4) in kvm_lapic_set_tpr()
2221 | (kvm_lapic_get_reg(apic, APIC_TASKPRI) & 4)); in kvm_lapic_set_tpr()
2228 tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI); in kvm_lapic_get_cr8()
2236 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_set_base() local
2238 if (!apic) in kvm_lapic_set_base()
2246 if (!apic) in kvm_lapic_set_base()
2252 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2256 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_lapic_set_base()
2261 kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2266 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()
2270 apic->base_address != APIC_DEFAULT_PHYS_BASE) in kvm_lapic_set_base()
2276 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_apicv() local
2280 apic->irr_pending = true; in kvm_apic_update_apicv()
2281 apic->isr_count = 1; in kvm_apic_update_apicv()
2283 apic->irr_pending = (apic_search_irr(apic) != -1); in kvm_apic_update_apicv()
2284 apic->isr_count = count_vectors(apic->regs + APIC_ISR); in kvm_apic_update_apicv()
2291 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_reset() local
2294 if (!apic) in kvm_lapic_reset()
2298 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reset()
2303 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_reset()
2305 kvm_apic_set_version(apic->vcpu); in kvm_lapic_reset()
2308 kvm_lapic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED); in kvm_lapic_reset()
2309 apic_update_lvtt(apic); in kvm_lapic_reset()
2312 kvm_lapic_set_reg(apic, APIC_LVT0, in kvm_lapic_reset()
2314 apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0)); in kvm_lapic_reset()
2316 kvm_apic_set_dfr(apic, 0xffffffffU); in kvm_lapic_reset()
2317 apic_set_spiv(apic, 0xff); in kvm_lapic_reset()
2318 kvm_lapic_set_reg(apic, APIC_TASKPRI, 0); in kvm_lapic_reset()
2319 if (!apic_x2apic_mode(apic)) in kvm_lapic_reset()
2320 kvm_apic_set_ldr(apic, 0); in kvm_lapic_reset()
2321 kvm_lapic_set_reg(apic, APIC_ESR, 0); in kvm_lapic_reset()
2322 kvm_lapic_set_reg(apic, APIC_ICR, 0); in kvm_lapic_reset()
2323 kvm_lapic_set_reg(apic, APIC_ICR2, 0); in kvm_lapic_reset()
2324 kvm_lapic_set_reg(apic, APIC_TDCR, 0); in kvm_lapic_reset()
2325 kvm_lapic_set_reg(apic, APIC_TMICT, 0); in kvm_lapic_reset()
2327 kvm_lapic_set_reg(apic, APIC_IRR + 0x10 * i, 0); in kvm_lapic_reset()
2328 kvm_lapic_set_reg(apic, APIC_ISR + 0x10 * i, 0); in kvm_lapic_reset()
2329 kvm_lapic_set_reg(apic, APIC_TMR + 0x10 * i, 0); in kvm_lapic_reset()
2332 apic->highest_isr_cache = -1; in kvm_lapic_reset()
2333 update_divide_count(apic); in kvm_lapic_reset()
2334 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reset()
2339 apic_update_ppr(apic); in kvm_lapic_reset()
2358 static bool lapic_is_periodic(struct kvm_lapic *apic) in lapic_is_periodic() argument
2360 return apic_lvtt_period(apic); in lapic_is_periodic()
2365 struct kvm_lapic *apic = vcpu->arch.apic; in apic_has_pending_timer() local
2367 if (apic_enabled(apic) && apic_lvt_enabled(apic, APIC_LVTT)) in apic_has_pending_timer()
2368 return atomic_read(&apic->lapic_timer.pending); in apic_has_pending_timer()
2373 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type) in kvm_apic_local_deliver() argument
2375 u32 reg = kvm_lapic_get_reg(apic, lvt_type); in kvm_apic_local_deliver()
2378 if (kvm_apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) { in kvm_apic_local_deliver()
2382 return __apic_accept_irq(apic, mode, vector, 1, trig_mode, in kvm_apic_local_deliver()
2390 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_nmi_wd_deliver() local
2392 if (apic) in kvm_apic_nmi_wd_deliver()
2393 kvm_apic_local_deliver(apic, APIC_LVT0); in kvm_apic_nmi_wd_deliver()
2404 struct kvm_lapic *apic = container_of(ktimer, struct kvm_lapic, lapic_timer); in apic_timer_fn() local
2406 apic_timer_expired(apic, true); in apic_timer_fn()
2408 if (lapic_is_periodic(apic)) { in apic_timer_fn()
2409 advance_periodic_target_expiration(apic); in apic_timer_fn()
2418 struct kvm_lapic *apic; in kvm_create_lapic() local
2422 apic = kzalloc(sizeof(*apic), GFP_KERNEL_ACCOUNT); in kvm_create_lapic()
2423 if (!apic) in kvm_create_lapic()
2426 vcpu->arch.apic = apic; in kvm_create_lapic()
2428 apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); in kvm_create_lapic()
2429 if (!apic->regs) { in kvm_create_lapic()
2434 apic->vcpu = vcpu; in kvm_create_lapic()
2436 hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC, in kvm_create_lapic()
2438 apic->lapic_timer.timer.function = apic_timer_fn; in kvm_create_lapic()
2440 apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT; in kvm_create_lapic()
2443 apic->lapic_timer.timer_advance_ns = timer_advance_ns; in kvm_create_lapic()
2453 kvm_iodevice_init(&apic->dev, &apic_mmio_ops); in kvm_create_lapic()
2457 kfree(apic); in kvm_create_lapic()
2458 vcpu->arch.apic = NULL; in kvm_create_lapic()
2465 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_has_interrupt() local
2471 __apic_update_ppr(apic, &ppr); in kvm_apic_has_interrupt()
2472 return apic_has_interrupt_for_ppr(apic, ppr); in kvm_apic_has_interrupt()
2478 u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0); in kvm_apic_accept_pic_intr()
2480 if (!kvm_apic_hw_enabled(vcpu->arch.apic)) in kvm_apic_accept_pic_intr()
2490 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_inject_apic_timer_irqs() local
2492 if (atomic_read(&apic->lapic_timer.pending) > 0) { in kvm_inject_apic_timer_irqs()
2493 kvm_apic_inject_pending_timer_irqs(apic); in kvm_inject_apic_timer_irqs()
2494 atomic_set(&apic->lapic_timer.pending, 0); in kvm_inject_apic_timer_irqs()
2501 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_apic_interrupt() local
2514 apic_clear_irr(vector, apic); in kvm_get_apic_interrupt()
2521 apic_update_ppr(apic); in kvm_get_apic_interrupt()
2529 apic_set_isr(vector, apic); in kvm_get_apic_interrupt()
2530 __apic_update_ppr(apic, &ppr); in kvm_get_apic_interrupt()
2539 if (apic_x2apic_mode(vcpu->arch.apic)) { in kvm_apic_state_fixup()
2563 memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s)); in kvm_apic_get_state()
2570 __apic_read(vcpu->arch.apic, APIC_TMCCT)); in kvm_apic_get_state()
2577 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_state() local
2582 apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV))); in kvm_apic_set_state()
2589 memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); in kvm_apic_set_state()
2591 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_state()
2595 apic_update_ppr(apic); in kvm_apic_set_state()
2596 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_apic_set_state()
2597 apic_update_lvtt(apic); in kvm_apic_set_state()
2598 apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0)); in kvm_apic_set_state()
2599 update_divide_count(apic); in kvm_apic_set_state()
2600 __start_apic_timer(apic, APIC_TMCCT); in kvm_apic_set_state()
2602 apic->highest_isr_cache = -1; in kvm_apic_set_state()
2606 apic_find_highest_irr(apic)); in kvm_apic_set_state()
2608 apic_find_highest_isr(apic)); in kvm_apic_set_state()
2627 timer = &vcpu->arch.apic->lapic_timer.timer; in __kvm_migrate_apic_timer()
2640 struct kvm_lapic *apic) in apic_sync_pv_eoi_from_guest() argument
2665 vector = apic_set_eoi(apic); in apic_sync_pv_eoi_from_guest()
2666 trace_kvm_pv_eoi(apic, vector); in apic_sync_pv_eoi_from_guest()
2674 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic); in kvm_lapic_sync_from_vapic()
2679 if (kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_from_vapic()
2683 apic_set_tpr(vcpu->arch.apic, data & 0xff); in kvm_lapic_sync_from_vapic()
2693 struct kvm_lapic *apic) in apic_sync_pv_eoi_to_guest() argument
2697 apic->irr_pending || in apic_sync_pv_eoi_to_guest()
2699 apic->highest_isr_cache == -1 || in apic_sync_pv_eoi_to_guest()
2701 kvm_ioapic_handles_vector(apic, apic->highest_isr_cache)) { in apic_sync_pv_eoi_to_guest()
2709 pv_eoi_set_pending(apic->vcpu); in apic_sync_pv_eoi_to_guest()
2716 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_sync_to_vapic() local
2718 apic_sync_pv_eoi_to_guest(vcpu, apic); in kvm_lapic_sync_to_vapic()
2723 tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI) & 0xff; in kvm_lapic_sync_to_vapic()
2724 max_irr = apic_find_highest_irr(apic); in kvm_lapic_sync_to_vapic()
2727 max_isr = apic_find_highest_isr(apic); in kvm_lapic_sync_to_vapic()
2732 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_to_vapic()
2740 &vcpu->arch.apic->vapic_cache, in kvm_lapic_set_vapic_addr()
2748 vcpu->arch.apic->vapic_addr = vapic_addr; in kvm_lapic_set_vapic_addr()
2754 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_write() local
2757 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic)) in kvm_x2apic_msr_write()
2765 kvm_lapic_reg_write(apic, APIC_ICR2, (u32)(data >> 32)); in kvm_x2apic_msr_write()
2766 return kvm_lapic_reg_write(apic, reg, (u32)data); in kvm_x2apic_msr_write()
2771 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_read() local
2774 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic)) in kvm_x2apic_msr_read()
2780 if (kvm_lapic_reg_read(apic, reg, 4, &low)) in kvm_x2apic_msr_read()
2783 kvm_lapic_reg_read(apic, APIC_ICR2, 4, &high); in kvm_x2apic_msr_read()
2792 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_hv_vapic_msr_write() local
2799 kvm_lapic_reg_write(apic, APIC_ICR2, (u32)(data >> 32)); in kvm_hv_vapic_msr_write()
2800 return kvm_lapic_reg_write(apic, reg, (u32)data); in kvm_hv_vapic_msr_write()
2805 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_hv_vapic_msr_read() local
2811 if (kvm_lapic_reg_read(apic, reg, 4, &low)) in kvm_hv_vapic_msr_read()
2814 kvm_lapic_reg_read(apic, APIC_ICR2, 4, &high); in kvm_hv_vapic_msr_read()
2844 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_accept_events() local
2848 if (!lapic_in_kernel(vcpu) || !apic->pending_events) in kvm_apic_accept_events()
2861 if (test_bit(KVM_APIC_SIPI, &apic->pending_events)) in kvm_apic_accept_events()
2862 clear_bit(KVM_APIC_SIPI, &apic->pending_events); in kvm_apic_accept_events()
2866 pe = xchg(&apic->pending_events, 0); in kvm_apic_accept_events()
2869 if (kvm_vcpu_is_bsp(apic->vcpu)) in kvm_apic_accept_events()
2878 sipi_vector = apic->sipi_vector; in kvm_apic_accept_events()