1 // SPDX-License-Identifier: GPL-2.0-only
3  * Support of MSI, HPET and DMAR interrupts.
16 #include <linux/msi.h>
28 	msg->address_hi = MSI_ADDR_BASE_HI;  in __irq_msi_compose_msg()
31 		msg->address_hi |= MSI_ADDR_EXT_DEST_ID(cfg->dest_apicid);  in __irq_msi_compose_msg()
33 	msg->address_lo =  in __irq_msi_compose_msg()
35 		((apic->irq_dest_mode == 0) ?  in __irq_msi_compose_msg()
39 		MSI_ADDR_DEST_ID(cfg->dest_apicid);  in __irq_msi_compose_msg()
41 	msg->data =  in __irq_msi_compose_msg()
45 		MSI_DATA_VECTOR(cfg->vector);  in __irq_msi_compose_msg()
58 	irq_data_get_irq_chip(irqd)->irq_write_msi_msg(irqd, msg);  in irq_msi_update_msg()
65 	struct irq_data *parent = irqd->parent_data;  in msi_set_affinity()  local
74 	ret = parent->chip->irq_set_affinity(parent, mask, force);  in msi_set_affinity()
79 	 * For non-maskable and non-remapped MSI interrupts the migration  in msi_set_affinity()
82 	 * caused by the non-atomic update of the address/data pair.  in msi_set_affinity()
85 	 * - The MSI is maskable (remapped MSI does not use this code path)).  in msi_set_affinity()
87 	 * - The new vector is the same as the old vector  in msi_set_affinity()
88 	 * - The old vector is MANAGED_IRQ_SHUTDOWN_VECTOR (interrupt starts up)  in msi_set_affinity()
89 	 * - The new destination CPU is the same as the old destination CPU  in msi_set_affinity()
92 	    cfg->vector == old_cfg.vector ||  in msi_set_affinity()
94 	    cfg->dest_apicid == old_cfg.dest_apicid) {  in msi_set_affinity()
136 	if (IS_ERR_OR_NULL(this_cpu_read(vector_irq[cfg->vector])))  in msi_set_affinity()
137 		this_cpu_write(vector_irq[cfg->vector], VECTOR_RETRIGGERED);  in msi_set_affinity()
140 	old_cfg.vector = cfg->vector;  in msi_set_affinity()
164 	if (lapic_vector_set_in_irr(cfg->vector))  in msi_set_affinity()
165 		irq_data_get_irq_chip(irqd)->irq_retrigger(irqd);  in msi_set_affinity()
171  * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,
172  * which implement the MSI or MSI-X Capability Structure.
175 	.name			= "PCI-MSI",
191 	if (desc->msi_attrib.is_msix) {  in pci_msi_prepare()
192 		arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX;  in pci_msi_prepare()
194 		arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSI;  in pci_msi_prepare()
195 		arg->flags |= X86_IRQ_ALLOC_CONTIGUOUS_VECTORS;  in pci_msi_prepare()
223 	fn = irq_domain_alloc_named_fwnode("PCI-MSI");  in native_create_pci_msi_domain()
231 		pr_warn("Failed to initialize PCI-MSI irqdomain.\n");  in native_create_pci_msi_domain()
233 		d->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK;  in native_create_pci_msi_domain()
245 	.name			= "IR-PCI-MSI",
262 struct irq_domain *arch_create_remap_msi_irq_domain(struct irq_domain *parent,  in arch_create_remap_msi_irq_domain()  argument
271 	d = pci_msi_create_irq_domain(fn, &pci_msi_ir_domain_info, parent);  in arch_create_remap_msi_irq_domain()
281 	dmar_msi_write(data->irq, msg);  in dmar_msi_write_msg()
285 	.name			= "DMAR-MSI",
299 	irq_domain_set_info(domain, virq, arg->devid, info->chip, NULL,  in dmar_msi_init()
300 			    handle_edge_irq, arg->data, "edge");  in dmar_msi_init()
325 	fn = irq_domain_alloc_named_fwnode("DMAR-MSI");  in dmar_get_irq_domain()
343 		return -1;  in dmar_alloc_hwirq()
361  * MSI message composition
368 	return (int)(long)info->data;  in hpet_dev_id()
377 	.name = "HPET-MSI",
392 	irq_domain_set_info(domain, virq, arg->hwirq, info->chip, NULL,  in hpet_msi_init()
393 			    handle_edge_irq, arg->data, "edge");  in hpet_msi_init()
418 	struct irq_domain *parent, *d;  in hpet_create_irq_domain()  local
430 	domain_info->data = (void *)(long)hpet_id;  in hpet_create_irq_domain()
435 	parent = irq_remapping_get_irq_domain(&info);  in hpet_create_irq_domain()
436 	if (parent == NULL)  in hpet_create_irq_domain()
437 		parent = x86_vector_domain;  in hpet_create_irq_domain()
439 		hpet_msi_controller.name = "IR-HPET-MSI";  in hpet_create_irq_domain()
448 	d = msi_create_irq_domain(fn, domain_info, parent);  in hpet_create_irq_domain()