Lines Matching refs:INTEL_ARCH_EVENT_MASK
94 ((config & INTEL_ARCH_EVENT_MASK) >= INTEL_TD_METRIC_RETIRING) && in is_metric_event()
95 ((config & INTEL_ARCH_EVENT_MASK) <= INTEL_TD_METRIC_MAX); in is_metric_event()
100 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_TD_SLOTS; in is_slots_event()
422 INTEL_ARCH_EVENT_MASK)
428 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
436 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
439 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
443 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
447 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
487 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
492 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
499 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
504 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
511 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
1091 hw_event = hwc->config & INTEL_ARCH_EVENT_MASK; in intel_pmu_has_bts_period()