Lines Matching +full:ide +full:- +full:port
1 // SPDX-License-Identifier: GPL-2.0
9 * SuperH SH4-202 MicroDev board support.
35 #define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */
36 #define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */
37 #define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */
50 #define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */
51 #define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */
52 #define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */
53 #define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */
61 /* General-Purpose base address on CPU-board FPGA */
80 return -ENODEV; in smsc_superio_setup()
94 /* program with port addresses */ in smsc_superio_setup()
105 /* program with port addresses */ in smsc_superio_setup()
112 /* Select the IDE#1 device */ in smsc_superio_setup()
116 /* program with port addresses */ in smsc_superio_setup()
126 /* Select the IDE#2 device */ in smsc_superio_setup()
130 /* program with port addresses */ in smsc_superio_setup()
140 /* enable the appropriate GPIO pins for IDE functionality: in smsc_superio_setup()