Lines Matching refs:xc
130 static u32 xive_scan_interrupts(struct xive_cpu *xc, bool just_peek) in xive_scan_interrupts() argument
136 while (xc->pending_prio != 0) { in xive_scan_interrupts()
139 prio = ffs(xc->pending_prio) - 1; in xive_scan_interrupts()
143 irq = xive_read_eq(&xc->queue[prio], just_peek); in xive_scan_interrupts()
161 xc->pending_prio &= ~(1 << prio); in xive_scan_interrupts()
168 q = &xc->queue[prio]; in xive_scan_interrupts()
183 if (prio != xc->cppr) { in xive_scan_interrupts()
185 xc->cppr = prio; in xive_scan_interrupts()
244 struct xive_cpu *xc = per_cpu(xive_cpu, cpu); in xmon_xive_do_dump() local
247 if (xc) { in xmon_xive_do_dump()
248 xmon_printf("pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr); in xmon_xive_do_dump()
252 u64 val = xive_esb_read(&xc->ipi_data, XIVE_ESB_GET); in xmon_xive_do_dump()
254 xmon_printf("IPI=0x%08x PQ=%c%c ", xc->hw_ipi, in xmon_xive_do_dump()
259 xive_dump_eq("EQ", &xc->queue[xive_irq_priority]); in xmon_xive_do_dump()
304 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_get_irq() local
321 xive_ops->update_pending(xc); in xive_get_irq()
323 DBG_VERBOSE("get_irq: pending=%02x\n", xc->pending_prio); in xive_get_irq()
326 irq = xive_scan_interrupts(xc, false); in xive_get_irq()
329 irq, xc->pending_prio); in xive_get_irq()
347 static void xive_do_queue_eoi(struct xive_cpu *xc) in xive_do_queue_eoi() argument
349 if (xive_scan_interrupts(xc, true) != 0) { in xive_do_queue_eoi()
350 DBG_VERBOSE("eoi: pending=0x%02x\n", xc->pending_prio); in xive_do_queue_eoi()
409 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_irq_eoi() local
412 d->irq, irqd_to_hwirq(d), xc->pending_prio); in xive_irq_eoi()
431 xive_do_queue_eoi(xc); in xive_irq_eoi()
473 struct xive_cpu *xc = per_cpu(xive_cpu, cpu); in xive_try_pick_target() local
474 struct xive_q *q = &xc->queue[xive_irq_priority]; in xive_try_pick_target()
497 struct xive_cpu *xc = per_cpu(xive_cpu, cpu); in xive_dec_target_count() local
498 struct xive_q *q = &xc->queue[xive_irq_priority]; in xive_dec_target_count()
500 if (WARN_ON(cpu < 0 || !xc)) { in xive_dec_target_count()
501 pr_err("%s: cpu=%d xc=%p\n", __func__, cpu, xc); in xive_dec_target_count()
578 struct xive_cpu *xc = per_cpu(xive_cpu, cpu); in xive_pick_irq_target() local
579 if (xc->chip_id == xd->src_chip) in xive_pick_irq_target()
1083 struct xive_cpu *xc; in xive_cause_ipi() local
1086 xc = per_cpu(xive_cpu, cpu); in xive_cause_ipi()
1089 smp_processor_id(), cpu, xc->hw_ipi); in xive_cause_ipi()
1091 xd = &xc->ipi_data; in xive_cause_ipi()
1104 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_ipi_eoi() local
1107 if (!xc) in xive_ipi_eoi()
1111 d->irq, irqd_to_hwirq(d), xc->hw_ipi, xc->pending_prio); in xive_ipi_eoi()
1113 xive_do_source_eoi(xc->hw_ipi, &xc->ipi_data); in xive_ipi_eoi()
1114 xive_do_queue_eoi(xc); in xive_ipi_eoi()
1154 struct xive_cpu *xc; in xive_setup_cpu_ipi() local
1159 xc = per_cpu(xive_cpu, cpu); in xive_setup_cpu_ipi()
1162 if (xc->hw_ipi != XIVE_BAD_IRQ) in xive_setup_cpu_ipi()
1166 if (xive_ops->get_ipi(cpu, xc)) in xive_setup_cpu_ipi()
1173 rc = xive_ops->populate_irq_data(xc->hw_ipi, &xc->ipi_data); in xive_setup_cpu_ipi()
1178 rc = xive_ops->configure_irq(xc->hw_ipi, in xive_setup_cpu_ipi()
1186 xc->hw_ipi, xive_ipi_irq, xc->ipi_data.trig_mmio); in xive_setup_cpu_ipi()
1189 xive_do_source_set_mask(&xc->ipi_data, false); in xive_setup_cpu_ipi()
1194 static void xive_cleanup_cpu_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_cleanup_cpu_ipi() argument
1199 if (xc->hw_ipi == XIVE_BAD_IRQ) in xive_cleanup_cpu_ipi()
1203 xive_do_source_set_mask(&xc->ipi_data, true); in xive_cleanup_cpu_ipi()
1212 xive_ops->configure_irq(xc->hw_ipi, hard_smp_processor_id(), in xive_cleanup_cpu_ipi()
1216 xive_ops->put_ipi(cpu, xc); in xive_cleanup_cpu_ipi()
1322 static void xive_cleanup_cpu_queues(unsigned int cpu, struct xive_cpu *xc) in xive_cleanup_cpu_queues() argument
1324 if (xc->queue[xive_irq_priority].qpage) in xive_cleanup_cpu_queues()
1325 xive_ops->cleanup_queue(cpu, xc, xive_irq_priority); in xive_cleanup_cpu_queues()
1328 static int xive_setup_cpu_queues(unsigned int cpu, struct xive_cpu *xc) in xive_setup_cpu_queues() argument
1333 if (!xc->queue[xive_irq_priority].qpage) in xive_setup_cpu_queues()
1334 rc = xive_ops->setup_queue(cpu, xc, xive_irq_priority); in xive_setup_cpu_queues()
1341 struct xive_cpu *xc; in xive_prepare_cpu() local
1343 xc = per_cpu(xive_cpu, cpu); in xive_prepare_cpu()
1344 if (!xc) { in xive_prepare_cpu()
1347 xc = kzalloc_node(sizeof(struct xive_cpu), in xive_prepare_cpu()
1349 if (!xc) in xive_prepare_cpu()
1353 xc->chip_id = of_get_ibm_chip_id(np); in xive_prepare_cpu()
1355 xc->hw_ipi = XIVE_BAD_IRQ; in xive_prepare_cpu()
1357 per_cpu(xive_cpu, cpu) = xc; in xive_prepare_cpu()
1361 return xive_setup_cpu_queues(cpu, xc); in xive_prepare_cpu()
1366 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_setup_cpu() local
1370 xive_ops->setup_cpu(smp_processor_id(), xc); in xive_setup_cpu()
1373 xc->cppr = 0xff; in xive_setup_cpu()
1402 static void xive_flush_cpu_queue(unsigned int cpu, struct xive_cpu *xc) in xive_flush_cpu_queue() argument
1410 while ((irq = xive_scan_interrupts(xc, false)) != 0) { in xive_flush_cpu_queue()
1459 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_smp_disable_cpu() local
1466 xc->cppr = 0; in xive_smp_disable_cpu()
1470 xive_flush_cpu_queue(cpu, xc); in xive_smp_disable_cpu()
1473 xc->cppr = 0xff; in xive_smp_disable_cpu()
1479 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_flush_interrupt() local
1483 xive_flush_cpu_queue(cpu, xc); in xive_flush_interrupt()
1492 struct xive_cpu *xc = __this_cpu_read(xive_cpu); in xive_teardown_cpu() local
1496 xc->cppr = 0; in xive_teardown_cpu()
1500 xive_ops->teardown_cpu(cpu, xc); in xive_teardown_cpu()
1504 xive_cleanup_cpu_ipi(cpu, xc); in xive_teardown_cpu()
1508 xive_cleanup_cpu_queues(cpu, xc); in xive_teardown_cpu()
1570 struct xive_cpu *xc = per_cpu(xive_cpu, cpu); in xive_debug_show_cpu() local
1573 if (xc) { in xive_debug_show_cpu()
1574 seq_printf(m, "pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr); in xive_debug_show_cpu()
1578 u64 val = xive_esb_read(&xc->ipi_data, XIVE_ESB_GET); in xive_debug_show_cpu()
1580 seq_printf(m, "IPI=0x%08x PQ=%c%c ", xc->hw_ipi, in xive_debug_show_cpu()
1586 struct xive_q *q = &xc->queue[xive_irq_priority]; in xive_debug_show_cpu()