1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2009-2010, 2012 Freescale Semiconductor, Inc.
5  * QorIQ (P1/P2) L2 controller init for Cache-SRAM instantiation
27 		return -EINVAL;  in get_cache_sram_params()
30 		return -EINVAL;  in get_cache_sram_params()
32 	sram_params->sram_offset = addr;  in get_cache_sram_params()
33 	sram_params->sram_size = size;  in get_cache_sram_params()
56 __setup("cache-sram-size=", get_size_from_cmdline);
57 __setup("cache-sram-offset=", get_offset_from_cmdline);
68 	if (!dev->dev.of_node) {  in mpc85xx_l2ctlr_of_probe()
69 		dev_err(&dev->dev, "Device's OF-node is NULL\n");  in mpc85xx_l2ctlr_of_probe()
70 		return -EINVAL;  in mpc85xx_l2ctlr_of_probe()
73 	prop = of_get_property(dev->dev.of_node, "cache-size", NULL);  in mpc85xx_l2ctlr_of_probe()
75 		dev_err(&dev->dev, "Missing L2 cache-size\n");  in mpc85xx_l2ctlr_of_probe()
76 		return -EINVAL;  in mpc85xx_l2ctlr_of_probe()
81 		return 0; /* fall back to L2 cache only */  in mpc85xx_l2ctlr_of_probe()
85 	if (rem || (ways & (ways - 1))) {  in mpc85xx_l2ctlr_of_probe()
86 		dev_err(&dev->dev, "Illegal cache-sram-size in command line\n");  in mpc85xx_l2ctlr_of_probe()
87 		return -EINVAL;  in mpc85xx_l2ctlr_of_probe()
90 	l2ctlr = of_iomap(dev->dev.of_node, 0);  in mpc85xx_l2ctlr_of_probe()
92 		dev_err(&dev->dev, "Can't map L2 controller\n");  in mpc85xx_l2ctlr_of_probe()
93 		return -EINVAL;  in mpc85xx_l2ctlr_of_probe()
97 	 * Write bits[0-17] to srbar0  in mpc85xx_l2ctlr_of_probe()
99 	out_be32(&l2ctlr->srbar0,  in mpc85xx_l2ctlr_of_probe()
103 	 * Write bits[18-21] to srbare0  in mpc85xx_l2ctlr_of_probe()
106 	out_be32(&l2ctlr->srbarea0,  in mpc85xx_l2ctlr_of_probe()
110 	clrsetbits_be32(&l2ctlr->ctl, L2CR_L2E, L2CR_L2FI);  in mpc85xx_l2ctlr_of_probe()
114 		setbits32(&l2ctlr->ctl,  in mpc85xx_l2ctlr_of_probe()
119 		setbits32(&l2ctlr->ctl,  in mpc85xx_l2ctlr_of_probe()
124 		setbits32(&l2ctlr->ctl,  in mpc85xx_l2ctlr_of_probe()
130 		setbits32(&l2ctlr->ctl,  in mpc85xx_l2ctlr_of_probe()
138 		dev_err(&dev->dev, "Can't instantiate Cache-SRAM\n");  in mpc85xx_l2ctlr_of_probe()
140 		return -EINVAL;  in mpc85xx_l2ctlr_of_probe()
152 	dev_info(&dev->dev, "MPC85xx L2 controller unloaded\n");  in mpc85xx_l2ctlr_of_remove()
159 		.compatible = "fsl,p2020-l2-cache-controller",
162 		.compatible = "fsl,p2010-l2-cache-controller",
165 		.compatible = "fsl,p1020-l2-cache-controller",
168 		.compatible = "fsl,p1011-l2-cache-controller",
171 		.compatible = "fsl,p1013-l2-cache-controller",
174 		.compatible = "fsl,p1022-l2-cache-controller",
177 		.compatible = "fsl,mpc8548-l2-cache-controller",
179 	{	.compatible = "fsl,mpc8544-l2-cache-controller",},
180 	{	.compatible = "fsl,mpc8572-l2-cache-controller",},
181 	{	.compatible = "fsl,mpc8536-l2-cache-controller",},
182 	{	.compatible = "fsl,p1021-l2-cache-controller",},
183 	{	.compatible = "fsl,p1012-l2-cache-controller",},
184 	{	.compatible = "fsl,p1025-l2-cache-controller",},
185 	{	.compatible = "fsl,p1016-l2-cache-controller",},
186 	{	.compatible = "fsl,p1024-l2-cache-controller",},
187 	{	.compatible = "fsl,p1015-l2-cache-controller",},
188 	{	.compatible = "fsl,p1010-l2-cache-controller",},
189 	{	.compatible = "fsl,bsc9131-l2-cache-controller",},
195 		.name		= "fsl-l2ctlr",
215 MODULE_DESCRIPTION("Freescale MPC85xx L2 controller init");