9  * 1999-2001 (c) Dan Malek <dan@embeddedalley.com>
19  * There are two 32-bit registers (high/low) for up to 64
53 static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
88 	out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);  in cpm2_mask_irq()
100 	out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);  in cpm2_unmask_irq()
111 	out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit);  in cpm2_ack()
123 	out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);  in cpm2_end_irq()
148 	} else {  in cpm2_set_irq_type()
159 	else  in cpm2_set_irq_type()
166 			edibit = (14 - (src - CPM2_IRQ_EXT1));  in cpm2_set_irq_type()
167 	else  in cpm2_set_irq_type()
169 			edibit = (31 - (CPM2_IRQ_PORTC0 - src));  in cpm2_set_irq_type()
170 		else  in cpm2_set_irq_type()
172 				IRQ_SET_MASK_OK_NOCOPY : -EINVAL;  in cpm2_set_irq_type()
174 	vold = in_be32(&cpm2_intctl->ic_siexr);  in cpm2_set_irq_type()
178 	else  in cpm2_set_irq_type()
182 		out_be32(&cpm2_intctl->ic_siexr, vnew);  in cpm2_set_irq_type()
187 	return -EINVAL;  in cpm2_set_irq_type()
207         bits = in_be32(&cpm2_intctl->ic_sivec);  in cpm2_get_irq()
211 		return(-1);  in cpm2_get_irq()
240 	/* Mask out everything */  in cpm2_pic_init()
242 	out_be32(&cpm2_intctl->ic_simrh, 0x00000000);  in cpm2_pic_init()
243 	out_be32(&cpm2_intctl->ic_simrl, 0x00000000);  in cpm2_pic_init()
247 	/* Ack everything */  in cpm2_pic_init()
248 	out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff);  in cpm2_pic_init()
249 	out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff);  in cpm2_pic_init()
253 	i = in_be32(&cpm2_intctl->ic_sivec);  in cpm2_pic_init()
259 	out_be16(&cpm2_intctl->ic_sicr, 0);  in cpm2_pic_init()
260 	out_be32(&cpm2_intctl->ic_scprrh, 0x05309770);  in cpm2_pic_init()
261 	out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);  in cpm2_pic_init()