Lines Matching full:bars
24 * For conventional PCI devices this isn't really an issue since PCI device BARs
32 * allocate the SR-IOV BARs in a way that lets us map them using the MBT.
48 * (num-vfs * num-sriov-bars) in total. To use a) we need the size of each segment
59 * At this point the device has been probed and the device's BARs are sized,
60 * but no resource allocations have been done. The SR-IOV BARs are sized
66 * sorts the BARs on a bus by their required alignment, which is calculated
112 * it only usable for devices with very large per-VF BARs. Such devices are
126 * us to support SR-IOV BARs in the 32bit MMIO window. This is useful since
218 /* Save ourselves some MMIO space by disabling the unusable BARs */ in pnv_pci_ioda_fixup_iov_resources()
264 * BARs would not be placed in the correct PE. in pnv_pci_iov_resource_alignment()
456 /* otherwise map each VF with single PE BARs */ in pnv_pci_vf_assign_m64()
612 /* Un-shift the IOV BARs if we need to */ in pnv_pci_sriov_disable()