Lines Matching +full:self +full:- +full:powered
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2003-2005 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
20 #include <asm/pci-bridge.h>
24 #include <asm/ppc-pci.h>
36 /* XXX Could be per-controller, but I don't think we risk anything by
61 for (; node; node = node->sibling) { in fixup_one_level_bus_range()
66 /* For PCI<->PCI bridges or CardBus bridges, we go down */ in fixup_one_level_bus_range()
67 class_code = of_get_property(node, "class-code", NULL); in fixup_one_level_bus_range()
71 bus_range = of_get_property(node, "bus-range", &len); in fixup_one_level_bus_range()
76 higher = fixup_one_level_bus_range(node->child, higher); in fixup_one_level_bus_range()
81 /* This routine fixes the "bus-range" property of all bridges in the
92 /* Lookup the "bus-range" property for the hose */ in fixup_bus_range()
93 prop = of_find_property(bridge, "bus-range", &len); in fixup_bus_range()
94 if (prop == NULL || prop->length < 2 * sizeof(int)) in fixup_bus_range()
97 bus_range = prop->value; in fixup_bus_range()
98 bus_range[1] = fixup_one_level_bus_range(bridge->child, bus_range[1]); in fixup_bus_range()
108 * "Chaos" is used in some "Bandit"-type machines as a bridge
145 if (bus->number == hose->first_busno) { in macrisc_cfg_map_bus()
150 caddr = MACRISC_CFA1(bus->number, dev_fn, offset); in macrisc_cfg_map_bus()
154 out_le32(hose->cfg_addr, caddr); in macrisc_cfg_map_bus()
155 } while (in_le32(hose->cfg_addr) != caddr); in macrisc_cfg_map_bus()
158 return hose->cfg_data + offset; in macrisc_cfg_map_bus()
180 np = of_pci_find_child_device(bus->dev.of_node, devfn); in chaos_map_bus()
184 vendor = of_get_property(np, "vendor-id", NULL); in chaos_map_bus()
185 device = of_get_property(np, "device-id", NULL); in chaos_map_bus()
207 hose->ops = &chaos_pci_ops; in setup_chaos()
208 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_chaos()
209 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); in setup_chaos()
216 * implement self-view of the HT host yet
222 * 0 -> No special case
223 * 1 -> Skip the device but act as if the access was successful
226 * -1 -> Hide the device (unsuccessful access)
234 /* We only allow config cycles to devices that are in OF device-tree in u3_ht_skip_device()
239 if (bus->self) in u3_ht_skip_device()
240 busdn = pci_device_to_OF_node(bus->self); in u3_ht_skip_device()
244 busdn = hose->dn; in u3_ht_skip_device()
245 for (dn = busdn->child; dn; dn = dn->sibling) in u3_ht_skip_device()
246 if (PCI_DN(dn) && PCI_DN(dn)->devfn == devfn) in u3_ht_skip_device()
249 return -1; in u3_ht_skip_device()
252 * When a device in K2 is powered down, we die on config in u3_ht_skip_device()
273 if (bus == hose->first_busno) { in u3_ht_cfg_access()
275 return hose->cfg_data + U3_HT_CFA0(devfn, offset); in u3_ht_cfg_access()
277 return ((void __iomem *)hose->cfg_addr) + (offset << 2); in u3_ht_cfg_access()
279 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); in u3_ht_cfg_access()
294 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap); in u3_ht_read_config()
345 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap); in u3_ht_write_config()
409 if (bus->number == hose->first_busno) { in u4_pcie_cfg_map_bus()
412 caddr = U4_PCIE_CFA1(bus->number, dev_fn, offset); in u4_pcie_cfg_map_bus()
416 out_le32(hose->cfg_addr, caddr); in u4_pcie_cfg_map_bus()
417 } while (in_le32(hose->cfg_addr) != caddr); in u4_pcie_cfg_map_bus()
420 return hose->cfg_data + offset; in u4_pcie_cfg_map_bus()
432 /* Apple's device-tree "hides" the root complex virtual P2P bridge in pmac_pci_fixup_u4_of_node()
433 * on U4. However, Linux sees it, causing the PCI <-> OF matching in pmac_pci_fixup_u4_of_node()
439 if (dev->dev.of_node == NULL) in pmac_pci_fixup_u4_of_node()
440 dev->dev.of_node = pcibios_get_phb_of_node(dev->bus); in pmac_pci_fixup_u4_of_node()
457 out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID); in init_bandit()
459 vendev = in_le32(bp->cfg_data); in init_bandit()
463 out_le32(bp->cfg_addr, in init_bandit()
466 rev = in_8(bp->cfg_data); in init_bandit()
476 out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC); in init_bandit()
478 magic = in_le32(bp->cfg_data); in init_bandit()
483 out_le32(bp->cfg_data, magic); in init_bandit()
488 * Tweak the PCI-PCI bridge chip on the blue & white G3s.
498 PCI-PCI bridge chip we have. */ in init_p2pbridge()
499 p2pbridge = of_find_node_by_name(NULL, "pci-bridge"); in init_p2pbridge()
500 if (p2pbridge == NULL || !of_node_name_eq(p2pbridge->parent, "pci")) in init_p2pbridge()
503 DBG("Can't find PCI infos for PCI<->PCI bridge\n"); in init_p2pbridge()
511 DBG("Can't find hose for PCI<->PCI bridge\n"); in init_p2pbridge()
559 * code re-enables it ;)
571 prop = of_get_property(nec, "vendor-id", NULL); in fixup_nec_usb2()
576 prop = of_get_property(nec, "device-id", NULL); in fixup_nec_usb2()
604 hose->ops = ¯isc_pci_ops; in setup_bandit()
605 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_bandit()
606 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); in setup_bandit()
615 hose->ops = ¯isc_pci_ops; in setup_uninorth()
616 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_uninorth()
617 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000); in setup_uninorth()
619 return addr->start == 0xf2000000; in setup_uninorth()
635 hose->first_busno = 0xf0; in setup_u3_agp()
636 hose->last_busno = 0xff; in setup_u3_agp()
638 hose->ops = ¯isc_pci_ops; in setup_u3_agp()
639 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u3_agp()
640 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); in setup_u3_agp()
646 /* We currently only implement the "non-atomic" config space, to in setup_u4_pcie()
649 hose->ops = &u4_pcie_pci_ops; in setup_u4_pcie()
650 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u4_pcie()
651 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); in setup_u4_pcie()
653 /* The bus contains a bridge from root -> device, we need to in setup_u4_pcie()
656 * config cycles to be type 1. So we override the "bus-range" in setup_u4_pcie()
659 hose->first_busno = 0x00; in setup_u4_pcie()
660 hose->last_busno = 0xff; in setup_u4_pcie()
666 unsigned long base, end, next = -1; in parse_region_decode()
667 int i, cur = -1; in parse_region_decode()
679 base = ((u32)i-16) << 28; in parse_region_decode()
687 hose->mem_resources[cur].flags = IORESOURCE_MEM; in parse_region_decode()
688 hose->mem_resources[cur].name = hose->dn->full_name; in parse_region_decode()
689 hose->mem_resources[cur].start = base; in parse_region_decode()
690 hose->mem_resources[cur].end = end; in parse_region_decode()
691 hose->mem_offset[cur] = 0; in parse_region_decode()
692 DBG(" %d: 0x%08lx-0x%08lx\n", cur, base, end); in parse_region_decode()
694 DBG(" : -0x%08lx\n", end); in parse_region_decode()
695 hose->mem_resources[cur].end = end; in parse_region_decode()
703 struct device_node *np = hose->dn; in setup_u3_ht()
707 hose->ops = &u3_ht_pci_ops; in setup_u3_ht()
717 /* Map external cfg space access into cfg_data and self registers in setup_u3_ht()
720 hose->cfg_data = ioremap(cfg_res.start, 0x02000000); in setup_u3_ht()
721 hose->cfg_addr = ioremap(self_res.start, resource_size(&self_res)); in setup_u3_ht()
728 hose->io_base_phys = 0xf4000000; in setup_u3_ht()
729 hose->pci_io_size = 0x00400000; in setup_u3_ht()
730 hose->io_resource.name = np->full_name; in setup_u3_ht()
731 hose->io_resource.start = 0; in setup_u3_ht()
732 hose->io_resource.end = 0x003fffff; in setup_u3_ht()
733 hose->io_resource.flags = IORESOURCE_IO; in setup_u3_ht()
734 hose->first_busno = 0; in setup_u3_ht()
735 hose->last_busno = 0xef; in setup_u3_ht()
738 decode = in_be32(hose->cfg_addr + 0x80); in setup_u3_ht()
755 * So for now, we just do a little hack. We happen to -know- that in setup_u3_ht()
786 bus_range = of_get_property(dev, "bus-range", &len); in pmac_add_bridge()
788 printk(KERN_WARNING "Can't get bus-range for %pOF, assume" in pmac_add_bridge()
794 return -ENOMEM; in pmac_add_bridge()
795 hose->first_busno = bus_range ? bus_range[0] : 0; in pmac_add_bridge()
796 hose->last_busno = bus_range ? bus_range[1] : 0xff; in pmac_add_bridge()
797 hose->controller_ops = pmac_pci_controller_ops; in pmac_add_bridge()
803 if (of_device_is_compatible(dev, "u3-agp")) { in pmac_add_bridge()
805 disp_name = "U3-AGP"; in pmac_add_bridge()
807 } else if (of_device_is_compatible(dev, "u3-ht")) { in pmac_add_bridge()
809 disp_name = "U3-HT"; in pmac_add_bridge()
811 } else if (of_device_is_compatible(dev, "u4-pcie")) { in pmac_add_bridge()
813 disp_name = "U4-PCIE"; in pmac_add_bridge()
817 " %d->%d\n", disp_name, hose->first_busno, hose->last_busno); in pmac_add_bridge()
822 if (of_device_is_compatible(dev, "uni-north")) { in pmac_add_bridge()
838 "Firmware bus number: %d->%d\n", in pmac_add_bridge()
839 disp_name, (unsigned long long)rsrc.start, hose->first_busno, in pmac_add_bridge()
840 hose->last_busno); in pmac_add_bridge()
843 DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", in pmac_add_bridge()
844 hose, hose->cfg_addr, hose->cfg_data); in pmac_add_bridge()
850 /* Fixup "bus-range" OF property */ in pmac_add_bridge()
862 * the ethernet-only board but not the combo ethernet/modem in pmac_pci_irq_fixup()
864 * -> 28+32 = 60. in pmac_pci_irq_fixup()
867 dev->vendor == PCI_VENDOR_ID_DEC && in pmac_pci_irq_fixup()
868 dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) { in pmac_pci_irq_fixup()
869 dev->irq = irq_create_mapping(NULL, 60); in pmac_pci_irq_fixup()
870 irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); in pmac_pci_irq_fixup()
878 struct pci_controller *hose = pci_bus_to_host(bridge->bus); in pmac_pci_root_bridge_prepare()
884 /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We in pmac_pci_root_bridge_prepare()
889 np = hose->dn; in pmac_pci_root_bridge_prepare()
890 PCI_DN(np)->busno = 0xf0; in pmac_pci_root_bridge_prepare()
892 PCI_DN(child)->busno = 0xf0; in pmac_pci_root_bridge_prepare()
961 if (dev->vendor == PCI_VENDOR_ID_APPLE in pmac_pci_enable_device_hook()
962 && dev->class == PCI_CLASS_SERIAL_USB_OHCI in pmac_pci_enable_device_hook()
972 uninorth_child = node->parent && in pmac_pci_enable_device_hook()
973 of_device_is_compatible(node->parent, "uni-north"); in pmac_pci_enable_device_hook()
976 * claiming them, we must re-enable them now. in pmac_pci_enable_device_hook()
1021 if (dev->class == PCI_CLASS_SERIAL_USB_OHCI && !node) in pmac_pci_fixup_ohci()
1022 dev->resource[0].flags = 0; in pmac_pci_fixup_ohci()
1027 * be powered back on later on
1034 if (nd->parent && (of_device_is_compatible(nd, "pci106b,18") || in pmac_pcibios_after_init()
1037 && of_device_is_compatible(nd->parent, "uni-north")) { in pmac_pcibios_after_init()
1043 if (nd->parent && of_device_is_compatible(nd, "gmac") in pmac_pcibios_after_init()
1044 && of_device_is_compatible(nd->parent, "uni-north")) in pmac_pcibios_after_init()
1057 if (dev->vendor != PCI_VENDOR_ID_TI) in pmac_pci_fixup_cardbus()
1059 if (dev->device == PCI_DEVICE_ID_TI_1130 || in pmac_pci_fixup_cardbus()
1060 dev->device == PCI_DEVICE_ID_TI_1131) { in pmac_pci_fixup_cardbus()
1069 if (dev->device == PCI_DEVICE_ID_TI_1210 || in pmac_pci_fixup_cardbus()
1070 dev->device == PCI_DEVICE_ID_TI_1211 || in pmac_pci_fixup_cardbus()
1071 dev->device == PCI_DEVICE_ID_TI_1410 || in pmac_pci_fixup_cardbus()
1072 dev->device == PCI_DEVICE_ID_TI_1510) { in pmac_pci_fixup_cardbus()
1098 if (dev->vendor == PCI_VENDOR_ID_PROMISE) in pmac_pci_fixup_pciata()
1099 switch(dev->device) { in pmac_pci_fixup_pciata()
1115 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) in pmac_pci_fixup_pciata()
1139 * Disable second function on K2-SATA, it's broken
1147 if (PCI_FUNC(dev->devfn) > 0) { in fixup_k2_sata()
1152 dev->resource[i].start = dev->resource[i].end = 0; in fixup_k2_sata()
1153 dev->resource[i].flags = 0; in fixup_k2_sata()
1162 dev->resource[i].start = dev->resource[i].end = 0; in fixup_k2_sata()
1163 dev->resource[i].flags = 0; in fixup_k2_sata()
1174 * causes problems with Linux which then re-assigns devices below the bridge,
1175 * thus changing addresses of those devices from what was in the device-tree,
1191 struct pci_controller *host = pci_bus_to_host(dev->bus); in fixup_u4_pcie()
1202 struct resource *r = &host->mem_resources[i]; in fixup_u4_pcie()
1203 if (!(r->flags & IORESOURCE_MEM)) in fixup_u4_pcie()
1208 if (r->start >= 0xf0000000 && r->start < 0xf3000000) in fixup_u4_pcie()
1221 * offset so let's just blast them as-is. We also know that they in fixup_u4_pcie()
1224 reg = ((region->start >> 16) & 0xfff0) | (region->end & 0xfff00000); in fixup_u4_pcie()
1241 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") || in pmac_pci_probe_mode()
1242 of_device_is_compatible(node, "u4-pcie") || in pmac_pci_probe_mode()
1243 of_device_is_compatible(node, "u3-ht"))) in pmac_pci_probe_mode()