16 PMU_FORMAT_ATTR(pmc,		"config:16-19");
47 	/* Only check pmc, unit and pmcxsel, ignore the edge bit (0) */  in event_is_fab_match()
127 static unsigned long combine_shift(unsigned long pmc)  in combine_shift()  argument
130 		return p9_MMCR1_COMBINE_SHIFT(pmc);  in combine_shift()
132 	return MMCR1_COMBINE_SHIFT(pmc);  in combine_shift()
258 	unsigned int unit, pmc, cache, ebb;  in isa207_get_constraint()  local
266 	pmc   = (event >> EVENT_PMC_SHIFT)        & EVENT_PMC_MASK;  in isa207_get_constraint()
276 	if (pmc) {  in isa207_get_constraint()
279 		if (pmc > 6)  in isa207_get_constraint()
285 		if (pmc >= 5 && base_event != 0x500fa &&  in isa207_get_constraint()
289 		mask  |= CNST_PMC_MASK(pmc);  in isa207_get_constraint()
290 		value |= CNST_PMC_VAL(pmc);  in isa207_get_constraint()
298 		if (pmc >= 5)  in isa207_get_constraint()
302 	if (pmc <= 4) {  in isa207_get_constraint()
305 		 * a PMC of 0 - they still need a PMC, it's just assigned later.  in isa207_get_constraint()
306 		 * Don't count events on PMC 5 & 6, there is only one valid event  in isa207_get_constraint()
322 			if (pmc == 4)  in isa207_get_constraint()
370 	if (!pmc && ebb)  in isa207_get_constraint()
371 		/* EBB events must specify the PMC */  in isa207_get_constraint()
403 	unsigned int pmc, pmc_inuse;  in isa207_compute_mmcr()  local
410 		pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;  in isa207_compute_mmcr()
411 		if (pmc)  in isa207_compute_mmcr()
412 			pmc_inuse |= 1 << pmc;  in isa207_compute_mmcr()
426 		pmc     = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;  in isa207_compute_mmcr()
431 		if (!pmc) {  in isa207_compute_mmcr()
432 			for (pmc = 1; pmc <= 4; ++pmc) {  in isa207_compute_mmcr()
433 				if (!(pmc_inuse & (1 << pmc)))  in isa207_compute_mmcr()
437 			pmc_inuse |= 1 << pmc;  in isa207_compute_mmcr()
440 		if (pmc <= 4) {  in isa207_compute_mmcr()
441 			mmcr1 |= unit << MMCR1_UNIT_SHIFT(pmc);  in isa207_compute_mmcr()
442 			mmcr1 |= combine << combine_shift(pmc);  in isa207_compute_mmcr()
443 			mmcr1 |= psel << MMCR1_PMCSEL_SHIFT(pmc);  in isa207_compute_mmcr()
505 			mmcr2 |= MMCR2_FCP(pmc);  in isa207_compute_mmcr()
508 			mmcr2 |= MMCR2_FCH(pmc);  in isa207_compute_mmcr()
512 				mmcr2 |= MMCR2_FCH(pmc);  in isa207_compute_mmcr()
514 				mmcr2 |= MMCR2_FCS(pmc);  in isa207_compute_mmcr()
518 			if (pmc <= 4) {  in isa207_compute_mmcr()
521 				mmcr3 |= val << MMCR3_SHIFT(pmc);  in isa207_compute_mmcr()
525 		hwc[i] = pmc - 1;  in isa207_compute_mmcr()
538 	/* If we're not using PMC 5 or 6, freeze them */  in isa207_compute_mmcr()
550 void isa207_disable_pmc(unsigned int pmc, struct mmcr_regs *mmcr)  in isa207_disable_pmc()  argument
552 	if (pmc <= 3)  in isa207_disable_pmc()
553 		mmcr->mmcr1 &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1));  in isa207_disable_pmc()