Lines Matching +full:0 +full:xb
80 #define OP31 0x1f /* 31 */
81 #define LFS 0x30 /* 48 */
82 #define LFSU 0x31 /* 49 */
83 #define LFD 0x32 /* 50 */
84 #define LFDU 0x33 /* 51 */
85 #define STFS 0x34 /* 52 */
86 #define STFSU 0x35 /* 53 */
87 #define STFD 0x36 /* 54 */
88 #define STFDU 0x37 /* 55 */
89 #define OP59 0x3b /* 59 */
90 #define OP63 0x3f /* 63 */
94 #define LFSX 0x217 /* 535 */
95 #define LFSUX 0x237 /* 567 */
96 #define LFDX 0x257 /* 599 */
97 #define LFDUX 0x277 /* 631 */
98 #define STFSX 0x297 /* 663 */
99 #define STFSUX 0x2b7 /* 695 */
100 #define STFDX 0x2d7 /* 727 */
101 #define STFDUX 0x2f7 /* 759 */
102 #define STFIWX 0x3d7 /* 983 */
106 #define FDIVS 0x012 /* 18 */
107 #define FSUBS 0x014 /* 20 */
108 #define FADDS 0x015 /* 21 */
109 #define FSQRTS 0x016 /* 22 */
110 #define FRES 0x018 /* 24 */
111 #define FMULS 0x019 /* 25 */
112 #define FRSQRTES 0x01a /* 26 */
113 #define FMSUBS 0x01c /* 28 */
114 #define FMADDS 0x01d /* 29 */
115 #define FNMSUBS 0x01e /* 30 */
116 #define FNMADDS 0x01f /* 31 */
120 #define FDIV 0x012 /* 18 */
121 #define FSUB 0x014 /* 20 */
122 #define FADD 0x015 /* 21 */
123 #define FSQRT 0x016 /* 22 */
124 #define FSEL 0x017 /* 23 */
125 #define FRE 0x018 /* 24 */
126 #define FMUL 0x019 /* 25 */
127 #define FRSQRTE 0x01a /* 26 */
128 #define FMSUB 0x01c /* 28 */
129 #define FMADD 0x01d /* 29 */
130 #define FNMSUB 0x01e /* 30 */
131 #define FNMADD 0x01f /* 31 */
134 #define FCMPU 0x000 /* 0 */
135 #define FRSP 0x00c /* 12 */
136 #define FCTIW 0x00e /* 14 */
137 #define FCTIWZ 0x00f /* 15 */
138 #define FCMPO 0x020 /* 32 */
139 #define MTFSB1 0x026 /* 38 */
140 #define FNEG 0x028 /* 40 */
141 #define MCRFS 0x040 /* 64 */
142 #define MTFSB0 0x046 /* 70 */
143 #define FMR 0x048 /* 72 */
144 #define MTFSFI 0x086 /* 134 */
145 #define FNABS 0x088 /* 136 */
146 #define FABS 0x108 /* 264 */
147 #define MFFS 0x247 /* 583 */
148 #define MTFSF 0x2c7 /* 711 */
158 #define XB 9 macro
222 return (fpscr & FPSCR_FEX) ? 1 : 0; in record_exception()
228 void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0; in do_mathemu()
231 u32 insn = 0; in do_mathemu()
232 int idx = 0; in do_mathemu()
234 int type = 0; in do_mathemu()
251 switch ((insn >> 1) & 0x3ff) { in do_mathemu()
267 switch ((insn >> 1) & 0x1f) { in do_mathemu()
271 case FSQRTS: func = fsqrts; type = XB; break; in do_mathemu()
272 case FRES: func = fres; type = XB; break; in do_mathemu()
274 case FRSQRTES: func = frsqrtes;type = XB; break; in do_mathemu()
285 if (insn & 0x20) { in do_mathemu()
286 switch ((insn >> 1) & 0x1f) { in do_mathemu()
290 case FSQRT: func = fsqrt; type = XB; break; in do_mathemu()
291 case FRE: func = fre; type = XB; break; in do_mathemu()
294 case FRSQRTE: func = frsqrte; type = XB; break; in do_mathemu()
305 switch ((insn >> 1) & 0x3ff) { in do_mathemu()
307 case FRSP: func = frsp; type = XB; break; in do_mathemu()
308 case FCTIW: func = fctiw; type = XB; break; in do_mathemu()
309 case FCTIWZ: func = fctiwz; type = XB; break; in do_mathemu()
312 case FNEG: func = fneg; type = XB; break; in do_mathemu()
315 case FMR: func = fmr; type = XB; break; in do_mathemu()
317 case FNABS: func = fnabs; type = XB; break; in do_mathemu()
318 case FABS: func = fabs; type = XB; break; in do_mathemu()
332 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
333 op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
334 op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
338 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
339 op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
340 op2 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f); in do_mathemu()
344 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
345 op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
346 op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
347 op3 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f); in do_mathemu()
351 idx = (insn >> 16) & 0x1f; in do_mathemu()
352 sdisp = (insn & 0xffff); in do_mathemu()
353 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
354 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); in do_mathemu()
358 idx = (insn >> 16) & 0x1f; in do_mathemu()
362 sdisp = (insn & 0xffff); in do_mathemu()
363 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
368 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
372 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
373 op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
376 case XB: in do_mathemu()
377 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
378 op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
382 idx = (insn >> 16) & 0x1f; in do_mathemu()
383 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
384 op1 = (void *)((idx ? regs->gpr[idx] : 0) in do_mathemu()
385 + regs->gpr[(insn >> 11) & 0x1f]); in do_mathemu()
389 idx = (insn >> 16) & 0x1f; in do_mathemu()
392 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu()
394 + regs->gpr[(insn >> 11) & 0x1f]); in do_mathemu()
399 op1 = (void *)((insn >> 23) & 0x7); in do_mathemu()
400 op2 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
401 op3 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
406 op1 = (void *)((insn >> 23) & 0x7); in do_mathemu()
407 op2 = (void *)((insn >> 18) & 0x7); in do_mathemu()
411 op0 = (void *)((insn >> 21) & 0x1f); in do_mathemu()
415 op0 = (void *)((insn >> 23) & 0x7); in do_mathemu()
416 op1 = (void *)((insn >> 12) & 0xf); in do_mathemu()
420 op0 = (void *)((insn >> 17) & 0xff); in do_mathemu()
421 op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
438 regs->ccr &= ~(0x0f000000); in do_mathemu()
439 regs->ccr |= (__FPU_FPSCR >> 4) & 0x0f000000; in do_mathemu()
457 return 0; in do_mathemu()