Lines Matching +full:0 +full:xc00000
37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
65 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
66 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
67 0xfef00000 0xfef00000 0x100000>; /* pci iack */
71 #size-cells = <0>;
72 cell-index = <0>;
74 reg = <0x80003000 0x1000>;
80 reg = <0x32>;
85 cell-index = <0>;
88 reg = <0x80004500 0x8>;
91 interrupts = <9 0>;
99 reg = <0x80004600 0x8>;
102 interrupts = <10 0>;
108 #address-cells = <0>;
112 reg = <0x80040000 0x40000>;
121 reg = <0xfec00000 0x400000>;
122 ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
123 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
124 bus-range = <0 255>;
127 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
130 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
131 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
132 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
133 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
135 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
136 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
137 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
138 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
139 /* IDSEL 14 - IRQ3 USB2.0 */
140 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
141 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
142 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
143 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1