Lines Matching +full:msi +full:- +full:cell
4 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <16384>; /* 16 kB */
40 d-cache-size = <16384>; /* 16 kB */
41 dcr-controller;
42 dcr-access-method = "native";
48 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
51 UIC0: interrupt-controller {
52 compatible = "ibm,uic-405ex", "ibm,uic";
53 interrupt-controller;
54 cell-index = <0>;
55 dcr-reg = <0x0c0 0x009>;
56 #address-cells = <0>;
57 #size-cells = <0>;
58 #interrupt-cells = <2>;
61 UIC1: interrupt-controller1 {
62 compatible = "ibm,uic-405ex","ibm,uic";
63 interrupt-controller;
64 cell-index = <1>;
65 dcr-reg = <0x0d0 0x009>;
66 #address-cells = <0>;
67 #size-cells = <0>;
68 #interrupt-cells = <2>;
70 interrupt-parent = <&UIC0>;
73 UIC2: interrupt-controller2 {
74 compatible = "ibm,uic-405ex","ibm,uic";
75 interrupt-controller;
76 cell-index = <2>;
77 dcr-reg = <0x0e0 0x009>;
78 #address-cells = <0>;
79 #size-cells = <0>;
80 #interrupt-cells = <2>;
82 interrupt-parent = <&UIC0>;
87 dcr-access-method = "native";
88 dcr-reg = <0x0b0 0x003>;
89 unused-units = <0x00000000>;
90 idle-doze = <0x02000000>;
95 compatible = "ibm,plb-405ex", "ibm,plb4";
96 #address-cells = <1>;
97 #size-cells = <1>;
99 clock-frequency = <0>; /* Filled in by U-Boot */
101 SDRAM0: memory-controller {
102 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
103 dcr-reg = <0x010 0x002>;
104 interrupt-parent = <&UIC2>;
110 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
112 interrupt-parent = <&UIC0>;
117 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
118 dcr-reg = <0x180 0x062>;
119 num-tx-chans = <2>;
120 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>;
123 #interrupt-cells = <1>;
124 #address-cells = <0>;
125 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
131 interrupt-map-mask = <0xffffffff>;
135 compatible = "ibm,opb-405ex", "ibm,opb";
136 #address-cells = <1>;
137 #size-cells = <1>;
141 dcr-reg = <0x0a0 0x005>;
142 clock-frequency = <0>; /* Filled in by U-Boot */
145 compatible = "ibm,ebc-405ex", "ibm,ebc";
146 dcr-reg = <0x012 0x002>;
147 #address-cells = <2>;
148 #size-cells = <1>;
149 clock-frequency = <0>; /* Filled in by U-Boot */
150 /* ranges property is supplied by U-Boot */
152 interrupt-parent = <&UIC1>;
155 compatible = "amd,s29gl512n", "cfi-flash";
156 bank-width = <2>;
158 #address-cells = <1>;
159 #size-cells = <1>;
181 label = "u-boot";
190 bank-settings = <0x80002222>;
191 #address-cells = <1>;
192 #size-cells = <1>;
195 #address-cells = <1>;
196 #size-cells = <1>;
199 label = "u-boot";
214 virtual-reg = <0xef600200>;
215 clock-frequency = <0>; /* Filled in by U-Boot */
216 current-speed = <0>;
217 interrupt-parent = <&UIC0>;
225 virtual-reg = <0xef600300>;
226 clock-frequency = <0>; /* Filled in by U-Boot */
227 current-speed = <0>;
228 interrupt-parent = <&UIC0>;
233 compatible = "ibm,iic-405ex", "ibm,iic";
235 interrupt-parent = <&UIC0>;
237 #address-cells = <1>;
238 #size-cells = <0>;
252 compatible = "ibm,iic-405ex", "ibm,iic";
254 interrupt-parent = <&UIC0>;
258 RGMII0: emac-rgmii@ef600b00 {
259 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
261 has-mdio;
265 linux,network-index = <0x0>;
267 compatible = "ibm,emac-405ex", "ibm,emac4sync";
268 interrupt-parent = <&EMAC0>;
270 #interrupt-cells = <1>;
271 #address-cells = <0>;
272 #size-cells = <0>;
273 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
276 local-mac-address = [000000000000]; /* Filled in by U-Boot */
277 mal-device = <&MAL0>;
278 mal-tx-channel = <0>;
279 mal-rx-channel = <0>;
280 cell-index = <0>;
281 max-frame-size = <9000>;
282 rx-fifo-size = <4096>;
283 tx-fifo-size = <2048>;
284 rx-fifo-size-gige = <16384>;
285 tx-fifo-size-gige = <16384>;
286 phy-mode = "rgmii";
287 phy-map = <0x00000000>;
288 rgmii-device = <&RGMII0>;
289 rgmii-channel = <0>;
290 has-inverted-stacr-oc;
291 has-new-stacr-staopc;
295 linux,network-index = <0x1>;
297 compatible = "ibm,emac-405ex", "ibm,emac4sync";
298 interrupt-parent = <&EMAC1>;
300 #interrupt-cells = <1>;
301 #address-cells = <0>;
302 #size-cells = <0>;
303 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
306 local-mac-address = [000000000000]; /* Filled in by U-Boot */
307 mal-device = <&MAL0>;
308 mal-tx-channel = <1>;
309 mal-rx-channel = <1>;
310 cell-index = <1>;
311 max-frame-size = <9000>;
312 rx-fifo-size = <4096>;
313 tx-fifo-size = <2048>;
314 rx-fifo-size-gige = <16384>;
315 tx-fifo-size-gige = <16384>;
316 phy-mode = "rgmii";
317 phy-map = <0x00000000>;
318 rgmii-device = <&RGMII0>;
319 rgmii-channel = <1>;
320 has-inverted-stacr-oc;
321 has-new-stacr-staopc;
327 #interrupt-cells = <1>;
328 #size-cells = <2>;
329 #address-cells = <3>;
330 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
335 dcr-reg = <0x040 0x020>;
336 sdr-base = <0x400>;
345 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
348 bus-range = <0x0 0x3f>;
352 * We are de-swizzling here because the numbers are actually for
355 * below are basically de-swizzled numbers.
358 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
359 interrupt-map = <
368 #interrupt-cells = <1>;
369 #size-cells = <2>;
370 #address-cells = <3>;
371 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
376 dcr-reg = <0x060 0x020>;
377 sdr-base = <0x440>;
386 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
389 bus-range = <0x40 0x7f>;
393 * We are de-swizzling here because the numbers are actually for
396 * below are basically de-swizzled numbers.
399 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
400 interrupt-map = <
407 MSI: ppc4xx-msi@C10000000 { label
408 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
410 sdr-base = <0x4B0>;
411 msi-data = <0x00000000>;
412 msi-mask = <0x44440000>;
413 interrupt-count = <12>;
415 interrupt-parent = <&UIC2>;
416 #interrupt-cells = <1>;
417 #address-cells = <0>;
418 #size-cells = <0>;
419 interrupt-map = <0 &UIC2 0x10 1