Lines Matching +full:0 +full:x100000

16 		reg = <0 0 0 0>;	// Filled by U-Boot
20 		reg = <0 0xe0005000 0 0x1000>;
22 		ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
26 		ranges = <0x0 0x0 0xe0000000 0x100000>;
30 		reg = <0 0xe0008000 0 0x1000>;
31 		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
32 			  0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
34 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
37 			/* IDSEL 0x11 J17 Slot 1 */
38 			0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
39 			0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
40 			0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
41 			0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
43 			/* IDSEL 0x12 J16 Slot 2 */
45 			0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
46 			0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
47 			0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
48 			0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
52 		reg = <0x0 0xe0009000 0x0 0x1000>;
53 		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
54 			  0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
55 		pcie@0 {
56 			ranges = <0x2000000 0x0 0x80000000
57 				  0x2000000 0x0 0x80000000
58 				  0x0 0x20000000
60 				  0x1000000 0x0 0x0
61 				  0x1000000 0x0 0x0
62 				  0x0 0x10000>;
67 		reg = <0x0 0xe000a000 0x0 0x1000>;
68 		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
69 			  0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
70 		pcie@0 {
71 			ranges = <0x2000000 0x0 0xa0000000
72 				  0x2000000 0x0 0xa0000000
73 				  0x0 0x10000000
75 				  0x1000000 0x0 0x0
76 				  0x1000000 0x0 0x0
77 				  0x0 0x10000>;
82 		reg = <0x0 0xe000b000 0x0 0x1000>;
83 		ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
84 			  0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
85 		pcie@0 {
86 			ranges = <0x2000000 0x0 0xb0000000
87 				  0x2000000 0x0 0xb0000000
88 				  0x0 0x100000
90 				  0x1000000 0x0 0x0
91 				  0x1000000 0x0 0x0
92 				  0x0 0x100000>;