Lines Matching +full:msi +full:- +full:cell
1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
12 #address-cells = <2>;
13 #size-cells = <1>;
16 dcr-parent = <&{/cpus/cpu@0}>;
25 #address-cells = <1>;
26 #size-cells = <0>;
32 clock-frequency = <0>; /* Filled in by U-Boot */
33 timebase-frequency = <0>; /* Filled in by U-Boot */
34 i-cache-line-size = <32>;
35 d-cache-line-size = <32>;
36 i-cache-size = <32768>;
37 d-cache-size = <32768>;
38 dcr-controller;
39 dcr-access-method = "native";
40 next-level-cache = <&L2C0>;
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
49 UIC0: interrupt-controller0 {
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
59 UIC1: interrupt-controller1 {
61 interrupt-controller;
62 cell-index = <1>;
63 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>;
65 #size-cells = <0>;
66 #interrupt-cells = <2>;
68 interrupt-parent = <&UIC0>;
71 UIC2: interrupt-controller2 {
73 interrupt-controller;
74 cell-index = <2>;
75 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
80 interrupt-parent = <&UIC0>;
83 UIC3: interrupt-controller3 {
85 interrupt-controller;
86 cell-index = <3>;
87 dcr-reg = <0x0f0 0x009>;
88 #address-cells = <0>;
89 #size-cells = <0>;
90 #interrupt-cells = <2>;
92 interrupt-parent = <&UIC0>;
98 cell-index = <1>;
99 /* configured in U-Boot */
104 compatible = "ibm,sdr-apm821xx";
105 dcr-reg = <0x00e 0x002>;
109 compatible = "ibm,cpr-apm821xx";
110 dcr-reg = <0x00c 0x002>;
114 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
115 dcr-reg = <0x020 0x008
117 cache-line-size = <32>;
118 cache-size = <262144>;
119 interrupt-parent = <&UIC1>;
125 #address-cells = <2>;
126 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by U-Boot */
131 compatible = "ibm,sdram-apm821xx";
132 dcr-reg = <0x010 0x002>;
137 descriptor-memory = "ocm";
138 dcr-reg = <0x180 0x062>;
139 num-tx-chans = <1>;
140 num-rx-chans = <1>;
141 #address-cells = <0>;
142 #size-cells = <0>;
143 interrupt-parent = <&UIC2>;
153 #address-cells = <1>;
154 #size-cells = <1>;
156 clock-frequency = <0>; /* Filled in by U-Boot */
160 dcr-reg = <0x012 0x002>;
161 #address-cells = <2>;
162 #size-cells = <1>;
163 clock-frequency = <0>; /* Filled in by U-Boot */
164 /* ranges property is supplied by U-Boot */
167 interrupt-parent = <&UIC1>;
170 compatible = "amd,s29gl512n", "cfi-flash";
171 bank-width = <2>;
173 #address-cells = <1>;
174 #size-cells = <1>;
184 label = "u-boot";
193 bank-settings = <0x80002222>;
194 #address-cells = <1>;
195 #size-cells = <1>;
198 #address-cells = <1>;
199 #size-cells = <1>;
218 label = "device-tree";
241 virtual-reg = <0xef600300>;
242 clock-frequency = <0>; /* Filled in by U-Boot */
243 current-speed = <0>; /* Filled in by U-Boot */
244 interrupt-parent = <&UIC1>;
252 virtual-reg = <0xef600400>;
253 clock-frequency = <0>; /* Filled in by U-Boot */
254 current-speed = <0>; /* Filled in by U-Boot */
255 interrupt-parent = <&UIC0>;
262 interrupt-parent = <&UIC0>;
264 #address-cells = <1>;
265 #size-cells = <0>;
269 interrupt-parent = <&UIC0>;
275 interrupt-parent = <&UIC1>;
283 interrupt-parent = <&UIC0>;
287 RGMII0: emac-rgmii@ef601500 {
290 has-mdio;
293 TAH0: emac-tah@ef601350 {
300 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
301 interrupt-parent = <&EMAC0>;
303 #interrupt-cells = <1>;
304 #address-cells = <0>;
305 #size-cells = <0>;
306 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
309 local-mac-address = [000000000000]; /* Filled in by U-Boot */
310 mal-device = <&MAL0>;
311 mal-tx-channel = <0>;
312 mal-rx-channel = <0>;
313 cell-index = <0>;
314 max-frame-size = <9000>;
315 rx-fifo-size = <16384>;
316 tx-fifo-size = <2048>;
317 phy-mode = "rgmii";
318 phy-map = <0x00000000>;
319 rgmii-device = <&RGMII0>;
320 rgmii-channel = <0>;
321 tah-device = <&TAH0>;
322 tah-channel = <0>;
323 has-inverted-stacr-oc;
324 has-new-stacr-staopc;
330 #interrupt-cells = <1>;
331 #size-cells = <2>;
332 #address-cells = <3>;
333 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
338 dcr-reg = <0x100 0x020>;
339 sdr-base = <0x300>;
349 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
352 bus-range = <0x40 0x7f>;
356 * We are de-swizzling here because the numbers are actually for
359 * below are basically de-swizzled numbers.
362 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
363 interrupt-map = <
370 MSI: ppc4xx-msi@C10000000 { label
371 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
374 sdr-base = <0x36C>;
375 msi-data = <0x00004440>;
376 msi-mask = <0x0000ffe0>;
378 interrupt-parent = <&MSI>;
379 #interrupt-cells = <1>;
380 #address-cells = <0>;
381 #size-cells = <0>;
382 msi-available-ranges = <0x0 0x100>;
383 interrupt-map = <