Lines Matching +full:low +full:- +full:precision

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5  * Floating-point emulation code
6  *  Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
47 #define copropbit	1<<31-2	/* bit position 2 */
51 #define twobits		3	/* mask low-order 2 bits */
52 #define fivebits	31	/* mask low-order 5 bits */
73 /* Single precision floating-point definitions */
75 # define Sgl_decrement(sgl_value) Sall(sgl_value)--
78 /* Double precision floating-point definitions */
81     if ((Dallp2(dbl_valuep2)--) == 0) Dallp1(dbl_valuep1)-- 
102      * that happen.  Want to keep this overhead low, but still provide  in decode_fpu()
113      *   the T-bit resets the exception_index to zero.  in decode_fpu()
117      * Check for reserved-op exception.  A reserved-op exception does not   in decode_fpu()
118      * set any exception registers nor does it set the T-bit.  If the T-bit  in decode_fpu()
119      * is not set then a reserved-op exception occurred.  in decode_fpu()
139 	   * codes: 0x1, 0x9, 0xb, 0x3, and 0x23.  PA-RISC 2.0 adds  in decode_fpu()
140 	   * another, 0x2b.  Only these have the low order bit set.  in decode_fpu()
145 		 * Clear T-bit and exception register so that  in decode_fpu()
153 		 * fpudispatch will return a non-zero number   in decode_fpu()
159 			 * We now need to make sure that the T-bit and the  in decode_fpu()
164 			 * Set t-bit since it might still be needed for a  in decode_fpu()
165 			 * subsequent real trap (I don't understand fully -PB)  in decode_fpu()
218 		         * If ra (round-away) is set, will   in decode_fpu()
230 		    	 * If ra (round-away) is set, will   in decode_fpu()
345 		 * other fields are non-zero.  in decode_fpu()